Abstract: In an embodiment, a set of texts associated with a domain is received. A set of hypothesis statements associated with the domain is received. A pre-trained natural language inference (NLI) model is applied on each of the received set of texts and on each of the received set of hypothesis statements. A second text corpus associated with the domain is generated. The generated second text corpus corresponds to a set of labels associated with the domain. A few-shot learning model is applied on the generated second text corpus to generate a third text corpus associated with the domain. The generated third text corpus is configured to fine-tune the applied pre-trained NLI model, and the fine-tuned NLI model is configured to label an input text associated with the domain. A display of the labelled input text on a display device is controlled.

Abstract: Disclosed in the present invention are a series of fused polycyclic substituted 5-carboxylic acid thienopyrimidine dione compounds and the use thereof. Specifically disclosed are a compound represented by formula (H) and a pharmaceutically acceptable salt thereof.

Abstract: The disclosure relates to technology for pre-fetching data. An apparatus comprises a processor core, pre-fetch logic, and a memory hierarchy. The pre-fetch logic is configured to generate cache pre-fetch requests for a program instruction identified by a program counter. The pre-fetch logic is configured to track one or more statistics with respect to the cache pre-fetch requests. The pre-fetch logic is configured to link the one or more statistics with the program counter. The pre-fetch logic is configured to determine a degree of the cache pre-fetch requests for the program instruction based on the one or more statistics. The memory hierarchy comprises main memory and a hierarchy of caches. The memory hierarchy further comprises a memory controller configured to pre-fetch memory blocks identified in the cache pre-fetch requests from a current level in the memory hierarchy into a higher level of the memory hierarchy.

Abstract: An electronic device includes a device casing, a display panel module disposed on the device casing and having a panel rear side, and a function module disposed between the device casing and the display panel module and comprising a function unit and a fixed bracket, the fixed bracket has a panel attaching surface and an installation surface, the fixed bracket is attached to the panel rear side via the panel attaching surface, the function unit is slidably disposed on the installation surface of the fixed bracket, and the installation surface and the panel attaching surface respectively face different directions.

Abstract: Provided herein are compounds of Formula (I), their pharmaceutically acceptable salts, and their pharmaceutical compositions: wherein R1, R2, R3a, R3b, R4, R5, and A are defined in the present disclosure. The compounds are potent inhibitors of the main protease (Mpro) of severe acute respiratory syndrome Coronavirus-2 (SARS-CoV-2), and they are useful in treating or preventing COVID-19 in a subject.

Abstract: A method of video decoding includes receiving a syntax element associated with a current coding block that is partitioned into a first part and a second part along a partition edge for prediction in a geometric partitioning mode. The method further includes determining a weight index at a sample position of the current coding block, and determining a stored motion vector type for a first motion storage unit in a motion field of the current coding block based on a motion index of the first motion storage unit. The method further includes storing the motion field of the current coding block based on the stored motion vector type determined for the first motion storage unit.

Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.

Abstract: Systems and methods of mitigating Coulomb effect in a multi-beam apparatus are disclosed. The multi-beam apparatus may include a charged-particle source configured to generate a primary charged-particle beam along a primary optical axis, a first aperture array comprising a first plurality of apertures having shapes and configured to generate a plurality of primary beamlets derived from the primary charged-particle beam, a condenser lens comprising a plane adjustable along the primary optical axis, and a second aperture array comprising a second plurality of apertures configured to generate probing beamlets corresponding to the plurality of beamlets, wherein each of the plurality of probing beamlets comprises a portion of charged particles of a corresponding primary beamlet based on at least a position of the plane of the condenser lens and a characteristic of the second aperture array.

Abstract: This application relates to apparatus and methods for identifying fraudulent transactions. A computing device receives return data identifying the return of at least one item. The computing device obtains modified strategy data identifying at least one rule of a modified strategy. The rule may be based on the application of at least one dimensionality reduction algorithm to an initial strategy. The computing device applies the modified strategy to the received return data identifying the return of the at least one item, and determines whether the return of the at least one item is fraudulent based on the application of the modified strategy. The computing device generates fraud data identifying whether the return of the at least one item is fraudulent based on the determination, and may transmit the fraud data to another computing device to indicate whether the return is fraudulent.

Abstract: The processing circuitry receives a coded video bitstream, the coded video bitstream includes coded information of a first block, the coded information indicates a use of a decoder side motion refinement (DMVR) on the first block. The first block has a first sample size. The processing circuitry applies an extended DMVR on the first block, the extended DMVR uses a second sample size for bilateral matching cost calculation, the second sample size is different from the first sample size of the first block. The processing circuitry calculates a plurality of bilateral matching costs respectively associated with a plurality of motion vector adjustments, at least a first bilateral matching cost in the plurality of bilateral matching costs is calculated based on the second sample size that is different from the first sample size of the first block. The processing circuitry determines a first refined motion vector and reconstructs accordingly.

Abstract: A current block is coded by an affine mode and includes a first control point at a first corner of the current block. A current template associated with the first control point is determined. A plurality of candidate reference templates is determined in a reference picture for the current template. A reference template is selected from the plurality of candidate reference templates for the current template based on a template matching (TM) cost. The TM cost indicates a respective difference between each candidate reference template and the current template of the first control point. A first control point motion vector (CPMV) is determined based on the selected reference template, where the first CPMV indicates an offset between the selected reference template in the reference picture and the current template associated with the first control point. The current block is reconstructed based at least on the first CPMV.

Abstract: Processing circuitry receives coded information of a motion vector difference (MVD). The processing circuitry calculates cost values associated with value combinations for a plurality of bits in coding bits of the MVD, at least one of the plurality of bits is a bit in a codeword for indicating a magnitude for the MVD. The processing circuitry determines a combination of prediction values for the plurality of bits from the value combinations, the combination of prediction values is associated with a lowest cost value in the cost values. The processing circuitry decodes the coded information of the MVD to obtain one or more indicators for the combination of prediction values, the one or more indicators indicates whether the plurality of bits is correctly predicted by the combination of prediction values. The processing circuitry determines the MVD based on the combination of prediction values and the one or more indicators.

Abstract: Processing circuitry determines an initial affine model with bi-prediction for a current block in an affine motion inter prediction mode, the initial affine model predicts the current block based on a first reference picture and a second reference picture. The processing circuitry performs a multi-stage bilateral matching motion refinement with at least a first stage and a second stage on the initial affine model to derive a refined affine model, one of the first stage and the second stage applies a first bilateral matching motion refinement on a translational component of the initial affine model, and the other of the first stage and the second stage applies a second bilateral matching motion refinement on a non-translational component of the initial affine model. The processing circuitry reconstructs the current block using the refined affine model based on the first reference picture and the second reference picture.

Abstract: A video bitstream comprising coding information of a current block in a current picture is received. The coding information indicates that the current block is coded by a flip mode in which locations of samples of the current block are adjusted within the current block. A reference block is determined from a plurality of candidate reference blocks in a reconstructed region of the current picture for the current block based on template matching (TM) costs. The TM costs indicate differences between a template of the current block and respective templates of the plurality of candidate reference blocks. A reconstruction block of the current block is determined based on the determined reference block. The current block is reconstructed by adjusting locations of samples of the reconstruction block within the reconstruction block based on the flip mode.

Abstract: Aspects of the disclosure include methods and apparatuses for video coding. One of the apparatuses includes processing circuitry that receives a current block in a bitstream. The current block is predicted with intra prediction fusion comprising multiple candidate intra prediction modes. The processing circuitry determines a respective candidate prediction value of a sample in the current block for each of the multiple candidate intra prediction modes. The processing circuitry derives weights of the respective multiple candidate intra prediction modes based on intra prediction modes used to code neighboring blocks of the current block. The processing circuitry predicts, according to the derived weights, the sample in the current block by a weighted sum of the candidate prediction values associated with the multiple candidate intra prediction modes.

Abstract: Aspects of the disclosure include methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes processing circuitry. The processing circuitry receives, from a coded video bitstream, coded information associated with a current block in a current picture. The coded information indicates that the current block is coded in a geometric partition mode (GPM), the current block is partitioned into at least a first partition and a second partition in the GPM by a partition edge. The processing circuitry determines that at least the first partition is coded in a subblock motion mode. The first partition includes a plurality of subblocks. The processing circuitry determines a plurality of motion vectors for the plurality of subblocks in the first partition of the current block, and reconstructs the plurality of subblocks in the first partition of the current block according to the plurality of motion vectors respectively.

Abstract: Aspects of the disclosure include methods and apparatuses for video coding. One of the apparatuses includes processing circuitry that receives a current block in a bitstream. The current block is predicted with intra prediction fusion comprising multiple candidate intra prediction modes. The processing circuitry derives a dominant intra prediction mode from the multiple candidate intra prediction modes. The processing circuitry applies a transform from a transform set associated with the dominant intra prediction mode for the current block and decodes the current block according to the transform.

Abstract: Processing circuitry for video decoding receives coded information of a current block in a current picture from a coded video bitstream, the coded information is indicative of applying local illumination compensation (LIC) on the current block in the current picture. The processing circuitry derives, parameters of an LIC model, according to a first template of a current block and a second template of a reference block in a reference picture. The reference block is pointed based on a motion vector for the current block. The first template includes a subset of reconstructed neighboring samples that are above and left to the current block, and the second template includes collocated samples to the subset of the reconstructed neighboring samples. The processing circuitry applies the LIC model on the current block according to the reference block to generate compensated samples of the current block.

Abstract: Processing circuitry receives coded information of a current block indicative of applying LIC on the current block according to at least a first reference block in a first reference picture. The processing circuitry determines, for a sample in the current block, at least a first reference sample in the first reference block, the first reference sample is co-located to the sample in the current block. The processing circuitry calculates a weighted sum of a plurality of terms and an offset for the LIC according to a plurality of parameter values for a plurality of parameters used in the LIC, and reconstructs the sample accordingly. The plurality of parameter values includes at least a first weighting value for a first weighting that is applied to a non-linear term of the first reference sample of a kth power, k is a power index value and is not equal to 1.

Abstract: The present invention relates to an ultra-high molecular weight polyethylene and a process for preparing the same, said ultra-high molecular weight polyethylene has a viscosity-average molecular weight of 150-1000×104 g/mol, a metal element content of 0-50 ppm, a bulk density of 0.30-0.55 g/cm3, a true density of 0.900-0.940 g/cm3, a melting point of 140-152° C., and a crystallinity of 40-75%, and said polyethylene satisfies at least one of condition (1) and condition (2): Condition (1): tensile elasticity modulus is greater than 250 MPa, preferably greater than 280 MPa, more preferably greater than 300 MPa, Condition (2): Young's modulus is greater than 300 MPa, preferably greater than 350 MPa. The ultra-high molecular weight polyethylene has high mechanical properties, high melting point, low metal element content and ash content, and the preparation process is simple, flexible and adjustable, and the ultra-high molecular weight ethylene copolymer has a high tensile elasticity module.