Patents by Inventor Liu Chen

Liu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240080471
    Abstract: Aspects of the disclosure provide a method and an apparatus including processing circuitry that determines, based on a syntax element in a coded video bitstream, that a current block including a plurality of subblocks is coded in a subblock-based temporal motion vector prediction (SbTMVP) mode. Motion vector offset (MVO) information indicating an MVO is received. The MVO indicates a motion offset of a displacement vector (DV) used to adjust a location of a collocated block in a collocated reference picture. An updated DV of the current block is determined based on the DV and the MVO. SbTMVP information of a respective subblock in the plurality of subblocks is derived based on motion information of a corresponding subblock in the collocated block indicated by the updated DV. The plurality of subblocks in the SbTMVP mode is reconstructed based on the SbTMVP information of the subblock in the plurality of subblocks.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: Tencent America LLC
    Inventors: Lien-Fei CHEN, Xin ZHAO, Roman CHERNYAK, Xiaozhong XU, Shan LIU
  • Publication number: 20240079239
    Abstract: A method includes implanting impurities in a semiconductor substrate to form an etch stop region within the semiconductor substrate; forming a transistor structure on a front side of the semiconductor substrate; forming a front-side interconnect structure over the transistor structure; performing a thinning process on a back side of the semiconductor substrate to reduce a thickness of the semiconductor substrate, wherein the thinning process is slowed by the etch stop region; and forming a back-side interconnect structure over the back side of the semiconductor substrate.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Inventors: Bau-Ming Wang, Liang-Yin Chen, Wei Tse Hsu, Jung-Tsan Tsai, Ya-Ching Tseng, Chunyii Liu
  • Publication number: 20240071711
    Abstract: Disclosed herein is an apparatus comprising: a first electrically conductive layer, a second electrically conductive layer; a plurality of optics element s between the first electrically conductive layer and the second electrically conductive layer, wherein the plurality of optics elements are configured to influence a plurality of beams of charged particles; a third electrically conductive layer between the first electrically conductive layer and the second electrically conductive layer; and an electrically insulating layer physically connected to the optics elements, wherein the eclectically insulating layer is configured to electrically insulate the optics elements from the first electrically conductive layer, and the second electrically conductive layer.
    Type: Application
    Filed: September 28, 2023
    Publication date: February 29, 2024
    Inventors: Xuerang HU, Weiming REN, Xuedong LIU, Zhong-wei CHEN
  • Patent number: 11915501
    Abstract: An object detection method and apparatus include obtaining a point cloud of a scene that includes location information of points. The point cloud is mapped to a 3D voxel representation. A convolution operation is performed on the feature information of the 3D voxel to obtain a convolution feature set and initial positioning information of a candidate object region is determined based on the convolution feature set. A target point is located in the candidate object region in the point cloud is determined and the initial positioning information of the candidate object region is adjusted based on the location information and target convolution feature information of the target point. Positioning information of a target object region is obtained to improve object detection accuracy.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: February 27, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yi Lun Chen, Shu Liu, Xiao Yong Shen, Yu Wing Tai, Jia Ya Jia
  • Patent number: 11917165
    Abstract: Aspects of the disclosure provide a method and an apparatus for video decoding. The apparatus includes processing circuitry receiving prediction information of a plurality of blocks in a current picture from a coded video bitstream. The processing circuitry determines, based on the prediction information, whether at least one of a decoder-side motion vector refinement (DMVR) mode or a bi-directional optical flow (BDOF) mode is allowed for the plurality of blocks. If the DMVR mode or the BDOF mode is allowed for the plurality of blocks, the processing circuitry determines that a plurality of merge with motion vector difference (MMVD) merge flags indicating whether a MMVD mode is applied to the plurality of blocks, respectively, is inferred as false for the plurality of blocks. If the plurality of MMVD merge flags is inferred as false, the processing circuitry reconstructs each block in the plurality of blocks without applying the MMVD mode.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: February 27, 2024
    Assignee: TENCENT AMERICA LLC
    Inventors: Xiang Li, Lien-Fei Chen, Shan Liu
  • Patent number: 11915064
    Abstract: The disclosure relates to processing application programming interface (API) requests. Embodiments include receiving, at an API wrapper, from a first caller, a first call to an API and sending the first call to the API. Embodiments include receiving, by the API wrapper, from one or more second callers, a second one or more calls to the API prior to receiving a response from the API to the first call. Embodiments include receiving, by the API wrapper, the response from the API to the first call and responding to the first call from the first caller with the response from the API to the first call. Embodiments include responding, by the API wrapper, to the second one or more calls from the one or more second callers with the response from the API to the first call without sending the second one or more calls to the API.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: February 27, 2024
    Assignee: VMware, Inc.
    Inventors: Yu Wu, Jin Feng, Sifan Liu, Zhiliang Zhang, Kai-chia Chen
  • Patent number: 11903132
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: February 13, 2024
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20230392933
    Abstract: Disclosed are a ship arrival prediction system and a ship arrival prediction method. The system includes a data acquisition module for acquiring historical sample data of a ship arrival; a data processing module connected with the data acquisition module and used for processing the historical sample data and converting the processed data into a two-dimensional matrix; a spatial temporal graph convolution layer module connected with the data processing module and used for modeling the converted data and obtaining optimal model parameters through training operations; and a full connection module connected with the spatial temporal graph convolution layer module and used for carrying out a dimensional reconstruction on an output result of the spatial temporal graph convolution layer module and outputting to obtain a predictive value of the ship arrival in each port.
    Type: Application
    Filed: August 1, 2022
    Publication date: December 7, 2023
    Applicant: Shanghai Maritime University
    Inventors: Guangnian XIAO, Yuanshuai OU, Qingan CUI, Bangping GU, Yu XIAO, Tian WANG, Liu CHEN, Chunyu WANG
  • Patent number: 11815588
    Abstract: A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: November 14, 2023
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Shirong Bu, Liu Chen, Cheng Zeng, Junsong Ning, Zhanping Wang, Yang Fu, Ruyi Wang, Chenle Wang
  • Publication number: 20230295610
    Abstract: A synthesis and screening method of a DNA-encoded compound library. The DNA-encoded compound library consists of a DNA-encoded compound of formula (I). The screening method includes: incubating the DNA-encoded compound library with a protein target, followed by covalent cross-linking to obtain a covalently cross-linked complex; separating the covalently cross-linked complex from members in the library that do not bind to the protein target; and subjecting the covalently cross-linked complex to polymerase chain reaction (PCR) amplification and DNA sequencing.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Jin LI, Guansai LIU, Huadong LUO, Liu CHEN, Junyang ZHU, Huiyong MA, Chao SONG, Jinqiao WAN
  • Publication number: 20230268159
    Abstract: The present application discloses a method for preparing a TEM sample, comprising: step 1, step 1, providing a chip sample having a metal protective layer formed on a first surface; step 2, fixing the chip sample on a sample table of a FIB system; step 3, performing the first time of FIB cutting on the metal protective layer along a first direction, so as to form a groove, wherein the first direction is the width direction of the TEM sample, and the inner side surface of the groove is arc-shaped so that the thickness of the metal protective layer in a groove area gradually changes; and step 4, performing the second time of FIB cutting along a third direction to thin the chip sample and form the TEM sample, wherein the third direction is a direction from the metal protective layer to the chip sample.
    Type: Application
    Filed: January 6, 2023
    Publication date: August 24, 2023
    Applicant: Shanghai Huali Integrated Circuit Corporation
    Inventors: Qiang Chen, Liu Chen, Jinde Gao
  • Publication number: 20230240012
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 27, 2023
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20230134984
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed. An example apparatus includes: An apparatus comprising: at least one memory; instructions; and processor circuitry to execute the instructions to: processor circuitry to execute the instructions to: identify a word in an image, the word to be converted to an audio waveform; encode the word identified in the image into an ordered list of phonemes; and synthesize the audio waveform of the word based on an output of a neural network that determines a duration that a phoneme of the ordered list of phonemes is to be expressed in the audio waveform.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 4, 2023
    Inventor: Liu Chen
  • Patent number: 11632860
    Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.
    Type: Grant
    Filed: October 25, 2019
    Date of Patent: April 18, 2023
    Assignee: Infineon Technologies AG
    Inventors: Petteri Palm, Martin Benisek, Liu Chen, Frank Daeche, Josef Maerz
  • Publication number: 20220356234
    Abstract: Disclosed herein are methods and compositions for reducing or eliminating a complement-mediated response in a patient receiving treatment for a disease or disorder wherein one or more therapeutic agents is administered to the patient along with one or more complement inhibitors. Administration of the complement inhibitor along with the therapeutic agent results in a reduced or eliminated complement-mediated response, such as a reduction or elimination of symptoms associated with Complement Activation-Related Pseudoallergy (CARPA) or Cytokine Release Syndrome (CRS).
    Type: Application
    Filed: October 1, 2020
    Publication date: November 10, 2022
    Applicant: Alexion Pharmaceuticals, Inc.
    Inventors: Yi Wang, Susan Liu-Chen
  • Publication number: 20220138213
    Abstract: The described implementations are operable to determine potential objects of interest to a user based on a blend of the user's long-term behavior and short-term interests. Long term user behavior may be determined for the user over a period of time and represented as continuous data. Short-term interest may be determined based on objects with which the user has recently interacted, and attributes of those objects may be represented together as continuous data corresponding to the short-term user interest. The continuous data of the short-term user interest and long-term user behavior may be blended to produce a user embedding. The user embedding may then be compared with objects to determine objects that are of potential interest to the user.
    Type: Application
    Filed: January 19, 2022
    Publication date: May 5, 2022
    Inventors: Sonja Sabina Knoll, Vitaliy Kulikov, Cole Timothy Rottweiler, Raymond Hsu, Jiacheng Hong, Zheng Liu, Siyang Xie, Andrew Liu Chen, Chao Wang, Mukund Narasimhan, Lance Alan Riedel
  • Patent number: 11239127
    Abstract: A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: February 1, 2022
    Assignee: Infineon Technologies AG
    Inventors: Edward Myers, Liu Chen, Chee Chiew Chong, Wee Aun Jason Lim, Wee Boon Tay
  • Patent number: 11232109
    Abstract: The described implementations are operable to determine potential objects of interest to a user based on a blend of the user's long-term behavior and short-term interests. Long term user behavior may be determined for the user over a period of time and represented as continuous data. Short-term interest may be determined based on objects with which the user has recently interacted and attributes of those objects may be represented together as continuous data corresponding to the short-term user interest. The continuous data of the short-term interest and long-term user behavior may be blended to produce a user embedding. The user embedding may then be compared with objects to determine objects that are of potential interest to the user.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: January 25, 2022
    Assignee: Pinterest, Inc.
    Inventors: Sonja Sabina Knoll, Vitaliy Kulikov, Cole Timothy Rottweiler, Raymond Hsu, Jiacheng Hong, Zheng Liu, Siyang Xie, Andrew Liu Chen, Chao Wang, Mukund Narasimhan, Lance Alan Riedel
  • Patent number: 11224638
    Abstract: The present disclosure provides a method of treating seizure in a subject having aberrant alkaline phosphatase activities, comprising administering a therapeutically effective amount of at least one recombinant alkaline phosphatase to the subject.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 18, 2022
    Assignee: Alexion Pharmaceuticals, Inc.
    Inventors: Andre Marozsan, Denise Devore, Susan Liu-Chen
  • Publication number: 20210398867
    Abstract: A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.
    Type: Application
    Filed: June 19, 2020
    Publication date: December 23, 2021
    Inventors: Edward MYERS, Liu CHEN, Chee Chiew CHONG, Wee Aun Jason LIM, Wee Boon TAY