Abstract: A semiconductor device is presented. The device includes a semiconductor layer including silicon carbide, and having a first surface and a second surface. A gate insulating layer is disposed on a portion of the first surface of the semiconductor layer, and a gate electrode is disposed on the gate insulating layer. The device further includes an oxide disposed between the gate insulating layer and the gate electrode at a corner adjacent an edge of the gate electrode so as the gate insulating layer has a greater thickness at the corner than a thickness at a center of the layer. A method for fabricating the device is also provided.

Abstract: A semiconductor device includes a substrate including silicon carbide; a drift layer disposed over the substrate including a drift region doped with a first dopant and conductivity type; and a second region, doped with a second dopant and conductivity type, adjacent to the drift region and proximal to a surface of the drift layer. The semiconductor device further includes a junction termination extension adjacent to the second region with a width and discrete regions separated in a first and second direction doped with varying concentrations of the second dopant type, and an effective doping profile of the second conductivity type of functional form that generally decreases away from the edge of the primary blocking junction. The width is less than or equal to a multiple of five times the width of the one-dimensional depletion width, and the charge tolerance of the semiconductor device is greater than 1.0×1013 per cm2.

Abstract: A power transistor assembly and method of operating the assembly are provided. The power transistor assembly includes integrated transient voltage suppression on a single semiconductor substrate and includes a transistor formed of a wide band gap material, the transistor including a gate terminal, a source terminal, and a drain terminal, the transistor further including a predetermined maximum allowable gate voltage value, and a transient voltage suppression (TVS) device formed of a wide band gap material, the TVS device formed with the transistor as a single semiconductor device, the TVS device electrically coupled to the transistor between at least one of the gate and source terminals and the drain and source terminals, the TVS device including a breakdown voltage limitation selected to be greater than the predetermined maximum allowable gate voltage value.

Abstract: A cooling device includes a ceramic substrate with a metal layer bonded to an outer planar surface. The cooling device also includes a channel layer bonded to an opposite side of the ceramic substrate and a manifold layer bonded to an outer surface of the channel layer. The substrate layers are bonded together using a high temperature process such as brazing to form a single substrate assembly. A plenum housing is bonded to the single substrate assembly via a low temperature bonding process such as adhesive bonding and is configured to provide extended manifold layer inlet and outlet ports.

Abstract: Embodiments of the present disclosure include a magnetic resonant imaging (MRI) system including a gradient driver configured to deliver a pulse sequence to gradient coils in the MRI system. The gradient driver may be interleaved, and may include two or more interleaved drivers, such that a high amplitude pulse may be output by operating the two interleaved parts of the gradient driver while spreading the electrical loss and maintaining the thermal stability of the system. In one embodiment, each interleaved driver may be rated to output approximately half a maximum amplitude of a current utilized by the gradient coil, and only one interleaved driver may be in operation if only one interleaved driver is sufficient for delivering a necessary pulse to the coils. Further, the interleaved drivers may alternate in operation to maintain thermal stability in the switching semiconductors of the gradient driver.

Abstract: A method for making a magnetic component is provided. The method comprises providing a core with one or more ridges protruding from one or more surfaces of the core, depositing one or more electrically conductive materials on the core, and removing at least a portion of the one or more ridges to form one or more continuous conductors wound around the core. Each of the one or more continuous conductors defines at least one insulating gap. Further, a magnetic component and methods for making the magnetic component are also presented.

Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.

Abstract: A power module includes at least one semiconductor die holding structure. Each die holding structure has a substantially cylindrical outer profile and a central axis. Each die holding structure is disposed within a common cylindrical EMI shield. A plurality of semiconductor devices are mounted to each die holding structure to form a substantially symmetric die mounting pattern respect to the central axis of the die holding structure.

Abstract: A lamp having a lighting source, integral electronics, and a thermal distribution mechanism disposed in a housing. The thermal distribution mechanism may include a variety of insulative, radiative, conductive, and convective heat distribution techniques. For example, the lamp may include a thermal shield between the lighting source and the integral electronics. The lamp also may have a forced convection mechanism, such as an air-moving device, disposed adjacent the integral electronics. A heat pipe, a heat sink, or another conductive heat transfer member also may be disposed in thermal communication with one or more of the integral electronics. For example, the integral electronics may be mounted to a thermally conductive board. The housing itself also may be thermally conductive to conductively spread the heat and convect/radiate the heat away from the lamp.

Abstract: A device is provided that includes a first conductive substrate and a second conductive substrate. A first power semiconductor component having a first thickness can be electrically coupled to the first conductive substrate. A second power semiconductor component having a second thickness can be electrically coupled to the second conductive substrate. A positive terminal can also be electrically coupled to the first conductive substrate, while a negative terminal can be electrically coupled to the second power semiconductor component, and an output terminal may be electrically coupled to the first power semiconductor component and the second conductive substrate. The terminals, the power semiconductor components, and the conductive substrates may thereby be incorporated into a common circuit loop, and may together be configured such that a width of the circuit loop in at least one direction is defined by at least one of the first thickness or the second thickness.

Abstract: Embodiments of the present disclosure include a magnetic resonant imaging (MRI) system including a gradient driver configured to deliver a pulse sequence to gradient coils in the MRI system. The gradient driver may be interleaved, and may include two or more interleaved drivers, such that a high amplitude pulse may be output by operating the two interleaved parts of the gradient driver while spreading the electrical loss and maintaining the thermal stability of the system. In one embodiment, each interleaved driver may be rated to output approximately half a maximum amplitude of a current utilized by the gradient coil, and only one interleaved driver may be in operation if only one interleaved driver is sufficient for delivering a necessary pulse to the coils. Further, the interleaved drivers may alternate in operation to maintain thermal stability in the switching semiconductors of the gradient driver.

Abstract: A method for making a magnetic component is provided. The method comprises providing a core with one or more ridges protruding from one or more surfaces of the core, depositing one or more electrically conductive materials on the core, and removing at least a portion of the one or more ridges to form one or more continuous conductors wound around the core. Each of the one or more continuous conductors defines at least one insulating gap. Further, a magnetic component and methods for making the magnetic component are also presented.

Abstract: A device is provided that includes a first conductive substrate and a second conductive substrate. A first power semiconductor component having a first thickness can be electrically coupled to the first conductive substrate. A second power semiconductor component having a second thickness can be electrically coupled to the second conductive substrate. A positive terminal can also be electrically coupled to the first conductive substrate, while a negative terminal can be electrically coupled to the second power semiconductor component, and an output terminal may be electrically coupled to the first power semiconductor component and the second conductive substrate. The terminals, the power semiconductor components, and the conductive substrates may thereby be incorporated into a common circuit loop, and may together be configured such that a width of the circuit loop in at least one direction is defined by at least one of the first thickness or the second thickness.

Abstract: A substrate for power electronics mounted thereon, comprises a middle ceramic layer having a lower surface and an upper surface, an upper metal layer attached to the upper surface of the middle ceramic layer, and a lower metal layer attached to the lower surface of the middle ceramic layer. The lower metal layer has a plurality of millichannels configured to deliver a coolant for cooling the power electronics, wherein the millichannels are formed on the lower metal layer prior to attachment to the lower surface of the middle ceramic layer. Methods for making a cooling device and an apparatus are also presented.

Abstract: A heatsink assembly for cooling a heated device includes a ceramic substrate having a plurality of cooling fluid channels integrated therein. The ceramic substrate includes a topside surface and a bottomside surface. A layer of electrically conducting material is bonded or brazed to only one of the topside and bottomside surfaces of the ceramic substrate. The electrically conducting material and the ceramic substrate have substantially identical coefficients of thermal expansion.

Abstract: A heat sink for directly cooling at least one electronic device package is provided. The electronic device package has an upper contact surface and a lower contact surface. The heat sink comprises a cooling piece formed of at least one thermally conductive material. The cooling piece defines multiple inlet manifolds configured to receive a coolant and multiple outlet manifolds configured to exhaust the coolant. The inlet and outlet manifolds are interleaved. The cooling piece further defines multiple millichannels configured to receive the coolant from the inlet manifolds and to deliver the coolant to the outlet manifolds. The millichannels and inlet and outlet manifolds are further configured to directly cool one of the upper and lower contact surface of the electronic device package by direct contact with the coolant, such that the heat sink comprises an integral heat sink.

Abstract: A substrate for power electronics mounted thereon, comprises a middle ceramic layer having a lower surface and an upper surface, an upper metal layer attached to the upper surface of the middle ceramic layer, and a lower metal layer attached to the lower surface of the middle ceramic layer. The lower metal layer has a plurality of millichannels configured to deliver a coolant for cooling the power electronics, wherein the millichannels are formed on the lower metal layer prior to attachment to the lower surface of the middle ceramic layer. Methods for making a cooling device and an apparatus are also presented.

Abstract: A galvanic isolated DC-DC and DC-AC power conversion system is coupled to a plurality of DC sources which are derived from a combination of a plurality of single-phase and three-phase AC-DC converters. The DC-DC and DC-AC power conversion system in one embodiment is configured to provide mixed type outputs (mixed frequency, e.g. DC with 50 or 60 Hz, with 400 Hz; mixed voltage levels).

Abstract: A cooling device includes a ceramic substrate with a metal layer bonded to an outer planar surface. The cooling device also includes a channel layer bonded to an opposite side of the ceramic substrate and a manifold layer bonded to an outer surface of the channel layer. The substrate layers are bonded together using a high temperature process such as brazing to form a single substrate assembly. A plenum housing is bonded to the single substrate assembly via a low temperature bonding process such as adhesive bonding and is configured to provide extended manifold layer inlet and outlet ports.

Abstract: A method of forming a vertical MOSFET device includes forming a first trench within a semiconductor layer of a first polarity, the first trench generally defining a well region of a second polarity opposite the first polarity; growing a first epitaxial well layer of the second polarity over the original semiconductor layer; growing a second epitaxial source contact layer of the first polarity over the well layer; forming a second trench through the source contact layer and at least a portion of the well layer; growing a third epitaxial layer of the second polarity over the source contact layer; and planarizing at least the first and second epitaxial layers so as to expose an upper surface of the original semiconductor layer, wherein a top surface of the third epitaxial layer is substantially coplanar with a top surface of the source contact layer prior to ohmic contact formation.