Patents by Inventor Luan Nguyen

Luan Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961898
    Abstract: A method of patterning a 2D material layer is includes selectively forming a first material layer on a surface of a substrate to form a first region in which the first material layer covers the surface of the substrate and to further form a second region in which the surface of the substrate is exposed from the first material layer, the first material layer having a strong adhesive force with a 2D material. The method further includes forming a 2D material layer is formed in both the first region and the second region. The method further includes selectively removing the 2D material layer from the second region based on using a physical removal method, such that the 2D material layer remains in the first region.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Van Luan Nguyen, Minsu Seol, Junyoung Kwon, Hyeonjin Shin, Minseok Yoo, Yeonchoo Cho
  • Patent number: 11901925
    Abstract: Transceiver circuitry in an integrated circuit device includes a receive path including an analog front end for receiving analog signals from an analog transmission path and conditioning the analog signals, and an analog-to-digital converter configured to convert the conditioned analog signals into received digital signals for delivery to functional circuitry, and a transmit path including a digital front end configured to accept digital signals from the functional circuitry and to condition the accepted digital signals, and a digital-to-analog converter configured to convert the conditioned digital signals into analog signals for transmission onto the analog transmission path. At least one of the analog front end and the digital front end introduces distortion and outputs a distorted conditioned signal.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 13, 2024
    Assignee: Marvell Asia Pte Ltd
    Inventors: Ray Luan Nguyen, Benjamin Tomas Reyes, Geoffrey Hatcher, Stephen Jantzi
  • Publication number: 20240034636
    Abstract: An amorphous boron nitride compound may include a boron nitride compound, where the boron nitride compound may be amorphous and may be doped with carbon or hydrogen. In the boron nitride compound, a total content of the carbon or the hydrogen may be in a range of about 0.1 at % to about 35 at % of a total atomic content.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 1, 2024
    Applicants: Samsung Electronics Co., Ltd., FUNDACIO INSTITUT CATALA DE NANOCIENCIA I NANOTECNOLOGIA (ICN2)
    Inventors: Stephan ROCHE, Aleandro ANTIDORMI, Onurcan KAYA, Van Luan NGUYEN, Hyeonjin SHIN, Taejin CHOI, Jaewon KIM, Taehoon KIM
  • Publication number: 20230402987
    Abstract: An analog front-end (AFE) device and method for a high baud-rate receiver. The device can include an input matching network coupled to a first buffer device, which is coupled to a sampler array. The input matching network can include a first T-coil configured to receive a first input and a second T-coil configured to receive a second input. The first buffer device can include one or more buffers each having a bias circuit coupled to a first class-AB source follower and a second class-AB source follower. The sampling array can include a plurality of sampler devices configured to receive a multi-phase clocking signal. Additional optimization techniques can be used, such as having a multi-tiered sampler array and having the first buffer device configured with separate buffers for odd and even sampling phases. Benefits of this AFE configuration can include increased bandwidth, sampling rate, and power efficiency.
    Type: Application
    Filed: August 22, 2023
    Publication date: December 14, 2023
    Inventors: Stephane DALLAIRE, Ray Luan NGUYEN, Geaffrey HATCHER
  • Patent number: 11836589
    Abstract: Systems and methods for optimizing trained ML hardware models by collecting machine learning (ML) training inputs and outputs; selecting a ML model architecture from ML model architectures; training the selected ML model architecture with the ML training inputs and outputs; selecting a hardware processor from hardware processors; and creating a trained ML hardware model by inputting the selected hardware processor with the trained ML model. ML test inputs and outputs, and types of test metrics are selected and used to test the trained ML hardware model to provide runtime test metrics data for ML output predictions made by the trained ML hardware model. The trained ML hardware model is optimized to become an optimized trained ML hardware model using the runtime test metrics by selecting a new selected ML model architecture, selecting a new selected hardware processor, or updating the trained ML model using the runtime metrics test data.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: December 5, 2023
    Assignee: Eta Compute, Inc.
    Inventors: Justin Ormont, Evan Petridis, Luan Nguyen, Jeremi Wojcicki
  • Patent number: 11750207
    Abstract: A multi-instance time-interleaving (TI) system and method of operation therefor. The system includes a plurality of TI devices, each with a plurality of clock generation units (CGUs) coupled to an interleaver network. Within each TI device, the plurality of CGUs provides a plurality of clock signals needed by the interleaver network. A phase detector device is coupled to the plurality of TI devices and configured to determine any phase differences between the clock signals of a designated reference TI device and the corresponding clock signals of each other TI device. To determine the phase differences, the phase detector can use a logic comparator configuration, a time-to-digital converter (TDC) configuration, or an auto-correlation configuration. The phases of the clock signals of each other TI device can be aligned to the reference TI device using internal phase control, retimers, delay cells, finite state machines, or the like.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: September 5, 2023
    Assignee: Marvell Asia Pte Ltd.
    Inventors: Ray Luan Nguyen, Geoffrey Hatcher
  • Patent number: 11750166
    Abstract: An analog front-end (AFE) device and method for a high baud-rate receiver. The device can include an input matching network coupled to a first buffer device, which is coupled to a sampler array. The input matching network can include a first T-coil configured to receive a first input and a second T-coil configured to receive a second input. The first buffer device can include one or more buffers each having a bias circuit coupled to a first class-AB source follower and a second class-AB source follower. The sampling array can include a plurality of sampler devices configured to receive a multi-phase clocking signal. Additional optimization techniques can be used, such as having a multi-tiered sampler array and having the first buffer device configured with separate buffers for odd and even sampling phases. Benefits of this AFE configuration can include increased bandwidth, sampling rate, and power efficiency.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: September 5, 2023
    Assignee: Marvell Asia Pte. Ltd.
    Inventors: Stephane Dallaire, Ray Luan Nguyen, Geoffrey Hatcher
  • Publication number: 20230235276
    Abstract: The present invention provides a Lactococcus lactis subspecies lactis isolate WFLU-12 with the accession number o KCTC 13180BP, and a use thereof.
    Type: Application
    Filed: December 13, 2021
    Publication date: July 27, 2023
    Inventors: Do-Hyung KIM, Thanh Luan NGUYEN, Nam-Eun KIM
  • Publication number: 20230127152
    Abstract: The invention relates to a method and an arrangement for monitoring a structural foundation in a ground for a structure, wherein ground parameters are determined for the ground, based on the determined ground parameters a preliminary ground model is calculated by means of a computer unit, on which a design of the structural foundation is laid out taking into consideration specification data of the structure to be erected, during and/or after the production of the structural foundation measured values relating to settlements, distortions and/or forces on the structural foundation or the structure are recorded by means of measuring means, the measured values are forwarded to the computer unit which checks if the measured values are consistent with the preliminary ground model, and if the measured values are not consistent with the preliminary ground model, a subsequent ground model, in which the measured values are consistent with the new ground model, is calculated by the computer unit.
    Type: Application
    Filed: March 4, 2021
    Publication date: April 27, 2023
    Applicant: BAUER Spezialtiefbau GmbH
    Inventors: Fadi HADDAD, Luan NGUYEN
  • Patent number: 11620854
    Abstract: Embodiments of the invention are directed to systems, methods, and devices for testing the security of a facial recognition system (FRS). A target image depicting a target person enrolled in the FRS and a tester image depicting a tester may be obtained. A plurality of transformed images may be generated from an image of the target person or the tester image. A processed tester image (e.g., one that is likely to cause the FRS to misclassify) may be identified using the plurality of transformed images, the tester image, and the target image. Data representing a light pattern can be generated using the processed tester image and the light pattern can be projected onto a second person. Another image may be captured of the second person with the light pattern as projected. This image may be provided to the FRS and a remedial action may be performed based on the corresponding output.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: April 4, 2023
    Assignee: VISA INTERNATIONAL SERVICE ASSOCIATION
    Inventors: Luan Nguyen, Sunpreet Singh Arora, Yuhang Wu, Hao Yang
  • Publication number: 20230033648
    Abstract: Embodiments disclosed herein include managing playback devices with limited capabilities and playback devices with advanced capabilities by way of a control device. In some embodiments, the control device may control a first playback device by way of a legacy control application including a first control interface comprising first playback controls operable to control the first playback device in performing a set of legacy playback functions. The mobile device may control a second playback device by way of a production control application including a second control interface comprising second playback controls operable to control the second playback device in performing a set of production playback functions.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 2, 2023
    Inventors: Allison Elliot, Zachary Kramer, Dmitri Siegel, Lindsay Whitworth, Wescott Fleming, Dane Estes, Luan Nguyen, Avram Goldyne
  • Publication number: 20230035036
    Abstract: A high-speed data receiver includes interleaver circuitry configured to divide a received data stream into a plurality of interleaved paths for processing, spectral content detection circuitry configured to derive spectral content information from data on each of the plurality of interleaved paths, sorting circuitry configured to bin the derived spectral content information according to energy levels, stream attribute determination circuitry configured to determine, based on sorted spectral content, one or more of path offsets of the interleaved paths, gain mismatch among interleaved paths, signal bandwidth mismatch and pulse width mismatch, and equalization circuitry configured to correct the one or more of the determined offsets, the determined gain mismatch and the determined signal width mismatch.
    Type: Application
    Filed: July 20, 2022
    Publication date: February 2, 2023
    Inventors: Ray Luan Nguyen, Dawood Alam, Nong Fan, Geoffrey Hatcher, Morteza Azarmnia
  • Publication number: 20230036435
    Abstract: Transceiver circuitry in an integrated circuit device includes a receive path including an analog front end for receiving analog signals from an analog transmission path and conditioning the analog signals, and an analog-to-digital converter configured to convert the conditioned analog signals into received digital signals for delivery to functional circuitry, and a transmit path including a digital front end configured to accept digital signals from the functional circuitry and to condition the accepted digital signals, and a digital-to-analog converter configured to convert the conditioned digital signals into analog signals for transmission onto the analog transmission path. At least one of the analog front end and the digital front end introduces distortion and outputs a distorted conditioned signal.
    Type: Application
    Filed: July 20, 2022
    Publication date: February 2, 2023
    Inventors: Ray Luan Nguyen, Benjamin Tomas Reyes, Geoffrey Hatcher, Stephen Jantzi
  • Publication number: 20220406911
    Abstract: Disclosed are an electronic device including a two-dimensional material, and a method of fabricating the electronic device. The electronic device may include a first metal layer including a transition metal, a second metal layer on the first metal layer and including gold (Au), and a two-dimensional material layer between the first metal layer and the second metal layer. The two-dimensional material layer may include a transition metal dichalcogenide (TMD). The two-dimensional material layer may be formed as a chalcogen element diffuses into the second metal layer and reacts with the transition metal of the first metal layer adjacent to the second metal layer.
    Type: Application
    Filed: December 8, 2021
    Publication date: December 22, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Minseok YOO, Minsu SEOL, Junyoung KWON, Kyung-Eun BYUN, Hyeonjin SHIN, Van Luan NGUYEN
  • Patent number: 11507129
    Abstract: A multi-layer time-interleaving (TI) device and method of operation therefor. This device includes a plurality of TI layers configured to receive a plurality of input clock signals and to output a plurality of output clock signals, each of which can be configured to drive subsequent devices. The layers include at least a first and second layer including a fine-grain propagation device and a barrel-shifting propagation device configured to retime the plurality of input clock signals to produce divided output clock signals. The device can include additional barrel-shifting propagation devices to time interleave an initial two layers to produce one or more additional layers. Using negative phase stepping, the plurality of output clock signals is produced with optimal timing margin and synchronized on a single clock edge.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: November 22, 2022
    Assignee: MARVELL ASIA PTE LTD.
    Inventors: Ray Luan Nguyen, Geoffrey O. Hatcher
  • Publication number: 20220271766
    Abstract: A multi-instance time-interleaving (TI) system and method of operation therefor. The system includes a plurality of TI devices, each with a plurality of clock generation units (CGUs) coupled to an interleaver network. Within each TI device, the plurality of CGUs provides a plurality of clock signals needed by the interleaver network. A phase detector device is coupled to the plurality of TI devices and configured to determine any phase differences between the clock signals of a designated reference TI device and the corresponding clock signals of each other TI device. To determine the phase differences, the phase detector can use a logic comparator configuration, a time-to-digital converter (TDC) configuration, or an auto-correlation configuration. The phases of the clock signals of each other TI device can be aligned to the reference TI device using internal phase control, retimers, delay cells, finite state machines, or the like.
    Type: Application
    Filed: April 18, 2022
    Publication date: August 25, 2022
    Inventors: Ray Luan NGUYEN, Geoffrey HATCHER
  • Patent number: 11416210
    Abstract: Embodiments disclosed herein include managing playback devices with limited capabilities and playback devices with advanced capabilities by way of a control device. In some embodiments, the control device may control a first playback device by way of a legacy control application including a first control interface comprising first playback controls operable to control the first playback device in performing a set of legacy playback functions. The mobile device may control a second playback device by way of a production control application including a second control interface comprising second playback controls operable to control the second playback device in performing a set of production playback functions.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: August 16, 2022
    Assignee: Sonos, Inc.
    Inventors: Allison Elliot, Zachary Kramer, Dmitri Siegel, Lindsay Whitworth, Wescott Fleming, Dane Estes, Luan Nguyen, Avram Goldyne
  • Publication number: 20220238692
    Abstract: A method of patterning a 2D material layer is includes selectively forming a first material layer on a surface of a substrate to form a first region in which the first material layer covers the surface of the substrate and to further form a second region in which the surface of the substrate is exposed from the first material layer, the first material layer having a strong adhesive force with a 2D material. The method further includes forming a 2D material layer is formed in both the first region and the second region. The method further includes selectively removing the 2D material layer from the second region based on using a physical removal method, such that the 2D material layer remains in the first region.
    Type: Application
    Filed: December 9, 2021
    Publication date: July 28, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Van Luan NGUYEN, Minsu SEOL, Junyoung KWON, Hyeonjin SHIN, Minseok YOO, Yeonchoo CHO
  • Publication number: 20220238721
    Abstract: A semiconductor device according to an embodiment may include a substrate, an adhesive layer, and a semiconductor layer. The semiconductor layer includes a 2D material having a layered structure. The adhesive layer is interposed between the substrate and the semiconductor layer, and has adhesiveness to a 2D material.
    Type: Application
    Filed: October 20, 2021
    Publication date: July 28, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Van Luan NGUYEN, Minsu SEOL, Eunkyu LEE, Junyoung KWON, Hyeonjin SHIN, Minseok YOO
  • Publication number: 20220224302
    Abstract: An analog front-end (AFE) device and method for a high baud-rate receiver. The device can include an input matching network coupled to a first buffer device, which is coupled to a sampler array. The input matching network can include a first T-coil configured to receive a first input and a second T-coil configured to receive a second input. The first buffer device can include one or more buffers each having a bias circuit coupled to a first class-AB source follower and a second class-AB source follower. The sampling array can include a plurality of sampler devices configured to receive a multi-phase clocking signal. Additional optimization techniques can be used, such as having a multi-tiered sampler array and having the first buffer device configured with separate buffers for odd and even sampling phases. Benefits of this AFE configuration can include increased bandwidth, sampling rate, and power efficiency.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: Stephane DALLAIRE, Ray Luan NGUYEN, Geoffrey HATCHER