Patents by Inventor Luis Vila

Luis Vila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9997254
    Abstract: A sample-and-hold circuit, which includes a hold capacitor at its output terminal and at least one intermediate capacitor, intermittently receives an input voltage, and a first value of a switch enable signal causes the sample-and-hold circuit to sample the input voltage and to charge the at least one intermediate capacitor and the hold capacitor to the input voltage, and when it is not receiving the input voltage, a second value of the switch enable signal causes the sample-and-hold circuit to hold, at its output terminal, the input voltage until the hold capacitor discharges, which starts to discharge only after the at least one intermediate capacitor has substantially discharged.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: June 12, 2018
    Assignee: NXP USA, INC.
    Inventors: André Luis Vilas Boas, Richard Titov Lara Saez, Javier Mauricio Olarte Gonzalez
  • Publication number: 20180151242
    Abstract: A sample and hold circuit including a charge path coupled to a voltage source. A first node of the charge path is located closer to the voltage source in the charge path than a second node of the charge path. The second node is coupled to an output of the sample and hold circuit to provide an output voltage. The sample and hold circuit includes a comparator circuit that compares the voltage of the first node and the voltage of the second node. When the comparator circuit determines that the voltage of the first node is a first condition with respect to a voltage of the second node, a voltage source provides a charging voltage on the first path to charge a first capacitor and a second capacitor to the charging voltage.
    Type: Application
    Filed: November 30, 2016
    Publication date: May 31, 2018
    Inventors: Andre Luis Vilas Boas, Richard Titov Lara Saez, Ivan Carlos Ribeiro Do Nascimento, Javier Mauricio Olarte Gonzalez
  • Patent number: 9984763
    Abstract: A sample and hold circuit including a charge path coupled to a voltage source. A first node of the charge path is located closer to the voltage source in the charge path than a second node of the charge path. The second node is coupled to an output of the sample and hold circuit to provide an output voltage. The sample and hold circuit includes a comparator circuit that compares the voltage of the first node and the voltage of the second node. When the comparator circuit determines that the voltage of the first node is a first condition with respect to a voltage of the second node, a voltage source provides a charging voltage on the first path to charge a first capacitor and a second capacitor to the charging voltage.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: May 29, 2018
    Assignee: NXP USA, INC.
    Inventors: Andre Luis Vilas Boas, Richard Titov Lara Saez, Ivan Carlos Ribeiro Do Nascimento, Javier Mauricio Olarte Gonzalez
  • Patent number: 9964975
    Abstract: A circuit includes a first resistive element having a first terminal coupled to an input node to receive a negative voltage, a second resistive element having a first terminal coupled to a first power supply terminal, and a third resistive element having a first terminal coupled to the first power supply terminal. A first current mirror includes a first transistor coupled to a second terminal of the second resistive element and a second transistor coupled to a second terminal of the third resistive element and the first transistor, wherein the output node corresponds to the second terminal of the third resistive element. A second current mirror includes a third transistor coupled to the first transistor and a fourth transistor coupled to the second transistor, third transistor, and a second terminal of the first resistive element. The circuit converts the negative voltage to the positive proportion voltage.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: May 8, 2018
    Assignee: NXP USA, Inc.
    Inventors: Pedro Barbosa Zanetta, Andre Luis Vilas Boas
  • Publication number: 20180046211
    Abstract: A voltage regulator circuit that regulates voltage on an output node that provides power to a load circuit having varying current draw. A feedback voltage from the output node is compared to reference voltages. In response to the comparisons, pull-up/down circuits are applied to a gate-control node connected to the gate of a pass transistor. The voltage of the gate-control node is adjusted by integrating current from the pull-up/down circuits. In response to the feedback voltage being between the first and second reference voltages, the voltage on the gate-control node is maintained by disabling the pull-up/down circuits at the gate-control node.
    Type: Application
    Filed: August 9, 2016
    Publication date: February 15, 2018
    Inventors: Andre Luis Vilas Boas, Dale McQuirk, Miten Nagda, Richard Titov Lara Saez
  • Publication number: 20180019020
    Abstract: A sample-and-hold circuit, which includes a hold capacitor at its output terminal and at least one intermediate capacitor, intermittently receives an input voltage, and a first value of a switch enable signal causes the sample-and-hold circuit to sample the input voltage and to charge the at least one intermediate capacitor and the hold capacitor to the input voltage, and when it is not receiving the input voltage, a second value of the switch enable signal causes the sample-and-hold circuit to hold, at its output terminal, the input voltage until the hold capacitor discharges, which starts to discharge only after the at least one intermediate capacitor has substantially discharged.
    Type: Application
    Filed: July 13, 2016
    Publication date: January 18, 2018
    Inventors: André Luis VILAS BOAS, Richard Titov Lara SAEZ, Javier Mauricio OLARTE GONZALEZ
  • Publication number: 20180018125
    Abstract: An apparatus embodiment includes an integrated circuit (IC) and breach-detection circuitry. The IC includes data storage circuitry, a power grid configured to distribute power to the data storage circuitry, and a plurality of nodes distributed over at least one sensitive region of the IC. The breach-detection circuitry monitors power grid integrity at the at least one sensitive region of the IC and detects an event indicative of a breach by an external probe at a portion of the at least one sensitive region in response to floating node detection or a change in voltage at one of the plurality of nodes.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 18, 2018
    Inventors: Fabio Duarte De Martin, Andre Luis Vilas Boas, Guilherme Godoi
  • Patent number: 9680453
    Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing oscillator circuits. In certain embodiments, an apparatus includes an oscillator circuit having one or more capacitors. The oscillator circuit is configured to generate an oscillating signal by repeated charging and discharging of the capacitors. The apparatus also includes a control circuit connected to the oscillator. The control circuit is configured to set the oscillation frequency of the oscillator circuit as a non-linear function of an input control signal. For instance, in a more specific embodiment, the control circuit may be configured to set oscillation frequency of the oscillator circuit to a frequency scaled by a value raised to an exponent specified by the input control signal.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: June 13, 2017
    Assignee: NXP USA, Inc.
    Inventors: Pedro Barbosa Zanetta, Andre Luis Vilas Boas
  • Patent number: 9645196
    Abstract: A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions of an electronic circuit within the integrated circuit in response to a momentary signal applied to the probe pad, a first inverter (221) having an input coupled to the probe pad and having an output coupled to a control input of the transmission gate, and a second inverter (222) having an input coupled to an output of the first inverter and having an output coupled to another control input of the transmission gate. The output of the second inverter is coupled to the input of the first inverter. Upon power-up, the transmission gate is open. After the momentary signal is applied to the probe pad, the transmission gate closes and remains closed until power is disconnected.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: May 9, 2017
    Assignee: NXP USA, INC.
    Inventors: Fabio Duarte De Martin, Andre Luis Vilas Boas
  • Patent number: 9644593
    Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: May 9, 2017
    Assignee: NXP USA, INC.
    Inventors: Adriano Marques Pereira, Sunny Gupta, Andre Luis Vilas Boas, Pedro Barbosa Zanetta, Ivan Carlos Ribeiro Nascimento, Carl Culshaw
  • Patent number: 9641129
    Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Pureza Coimbra, André Luis Vilas Boas, Alfredo Olmos
  • Publication number: 20170077872
    Abstract: A resistor-less amplifying circuit includes a plurality of resistor-less cells. Each cell includes a plurality of MOS transistors. Each cell generates a differential output equal to ?VGS of two MOS transistors with a magnitude of the differential output controlled by a control voltage generated by a differential amplifier coupled to a feedback loop around a cell. In one embodiment, the resistor-less amplifying circuit is a part of a bandgap voltage reference circuit. In another embodiment, the resistor-less amplifying circuit is part of a temperature sensor circuit.
    Type: Application
    Filed: September 16, 2015
    Publication date: March 16, 2017
    Inventors: Ricardo Pureza COIMBRA, André Luis VILAS BOAS, Alfredo OLMOS
  • Patent number: 9545149
    Abstract: A hygienic toothbrush maintenance system helps maintain a toothbrush in a hygienic state through use of at least one detachable head that can be interchanged, and ultraviolet light that immerses bristles to kill bacteria. A pair of tensioned wires on the detachable head slides in and out of a head end of the toothbrush to enable secure and easy detachable attachment of the detachable head from the toothbrush. A release switch enables detachment of the detachable head from the toothbrush, and is operable with one hand so as to minimize contact with the toothbrush. A docking platform retains the toothbrush in an upright position and stores the removed detachable heads. An ultraviolet portion includes a telescopically extendable stand and a hood that emits ultraviolet light. The hood pivots to substantially cover the detachable heads, while they are attached to the toothbrush, and while stored in a head reception portion.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: January 17, 2017
    Inventors: Luis Vila, Mariela Alvarado
  • Patent number: 9442501
    Abstract: A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 13, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stefano Pietri, Chris C. Dao, Andre Luis Vilas Boas
  • Patent number: 9356569
    Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: May 31, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Andre Luis Vilas Boas, Edevaldo Pereira Silva, Jr., Pedro Barbosa Zanetta, Eduardo Ribeiro da Silva
  • Patent number: 9254185
    Abstract: A dual purpose toothbrush that allows a user to clean his or her teeth and that also serves the purpose of preserving the record of the user's mouth via stored digital images. The dual purpose toothbrush that has a replaceable cartridge of rotating bristles and a camera system on the head of the toothbrush, a camera board that operates the basic functions of the camera and the rotating bristles of the toothbrush while temporarily storing images taken by the camera, a plurality of inputs that allow a user to operate the toothbrush, a wiring system that connects the components of the toothbrush, a rechargeable battery, and a port for charging and downloading images to a peripheral device.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: February 9, 2016
    Inventor: Luis Vila
  • Publication number: 20150346748
    Abstract: A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 3, 2015
    Inventors: STEFANO PIETRI, CHRIS C. DAO, ANDRE LUIS VILAS BOAS
  • Patent number: 9143115
    Abstract: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: September 22, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ivan Carlos Ribeiro Nascimento, Andre Luis Vilas Boas
  • Publication number: 20150263775
    Abstract: A cellular phone power case that does not require a power cord to recharge the power within the case, the power case comprises: A cellphone case, the cellphone case has a front, a back, a top, a bottom, a left and a right side, the front of the cellphone case defines a plurality of battery holders, each battery holder is adjacent to each corner of the cellphone case, the top side of the case defines a plurality of LED apertures, the left, right, and bottom sides of the case define a restraining arm; LED lights attached to the top of the cellphone case so that the plurality of LED apertures is aligned to the LED lights; a power adapter attached to the bottom restraining arm; a prong housing attached to back of the cellphone case, a pair of prongs that are a housed within the prong housing so that the prongs can be in either an extended or retracted position; a battery, the battery is secured within the plurality holders; a battery cover that is attached to the front of the cellphone case after the battery is i
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Inventor: Luis Vila
  • Publication number: 20150230595
    Abstract: A dual purpose toothbrush that allows a user to clean his or her teeth and that also serves the purpose of preserving the record of the user's mouth via stored digital images. The dual purpose toothbrush that has a replaceable cartridge of rotating bristles and a camera system on the head of the toothbrush, a camera board that operates the basic functions of the camera and the rotating bristles of the toothbrush while temporarily storing images taken by the camera, a plurality of inputs that allow a user to operate the toothbrush, a wiring system that connects the components of the toothbrush, a rechargeable battery, and a port for charging and downloading images to a peripheral device.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Inventor: LUIS VILA