Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

Abstract: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.

Abstract: A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.

Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.

Abstract: Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.

Abstract: A low voltage detector (100) includes a power supply voltage monitor circuit (110) that produces a voltage VSP related to a first a power supply voltage, and a voltage generator (105), which includes a plurality of self-cascode MOSFET (SCM) structures (101-103) in a cascade configuration, that generates a reference voltage Vxm. A voltage comparator (140) outputs an output signal in response to a differential between Vxm and VSP, wherein Vxm and VSP have proportional to absolute temperature behavior (PTAT) over temperature with respect to a second power supply voltage. The output signal changes state when the first power supply voltage equals a trip point of the comparator. Each SCM structure is sized to provide a rate of change with temperature of the PTAT behavior of Vxm that matches a rate of change with temperature of the PTAT behavior of VSP.

Abstract: A refillable toothbrush and base assembly having a handle assembly, a hinge assembly, a head assembly, brush assembly, a toothpaste cartridge assembly, and a base assembly. The brush assembly is removably mounted to the head assembly. When not in use, the refillable toothbrush assembly rests on the base. A hinge assembly is integrally mounted to the handle assembly. The toothpaste cartridge assembly includes a toothpaste cartridge with an end cap, a plunger and a plunger actuator having a knob. The brush assembly has an internal channel. Upon the rotation of the knob, the toothpaste is forced to travels through the toothpaste cartridge assembly to exit at the brush. A user may rotate the head assembly, with the brush assembly mounted thereto, to a position where the brush assembly is housed within a channel and a cavity disposed at the handle assembly.

Abstract: A sense amplifier (100) includes first and second inverters (112 and 113). The first inverter has an input terminal (116) and an OUT_B output node and a first transistor (124). The second inverter (113) has an input terminal (115) and an OUT output node and a second transistor (125). The OUT_B output node of the first inverter is coupled to an input terminal of the second inverter, and the OUT node of the second inverter is coupled to an input terminal of the first inverter. The sense amplifier does not use a reference current; therefore, the sense amplifier does not need a reference current generator. The sense amplifier needs only one enable signal to reset a latch (110) of the sense amplifier. When coupled to a non-volatile memory element, voltages at the output nodes are indicative of a logic level of a bit stored in the non-volatile memory element.

Abstract: Systems and methods for amplitude loop control for oscillators. In some embodiments, an electronic circuit may include oscillator circuitry configured to produce a periodic signal, and control circuitry operably coupled to the oscillator circuitry, the control circuitry including switched capacitor circuitry configured to determine a difference between maximum and minimum peak voltage values of the periodic signal, the control circuit configured to control a voltage amplitude of the periodic signal based upon the difference. In other embodiments, a method may include receiving a clock signal from a clock generator, determining, using a switched capacitor circuit, a first peak voltage value of the clock signal, determining, using the switched capacitor circuit, a second peak voltage value of the clock signal, and controlling a bias current applied to the clock generator based upon a difference between the first and second peak voltage values.

Abstract: A sense amplifier (100) includes first and second inverters (112 and 113). The first inverter has an input terminal (116) and an OUT_B output node and a first transistor (124). The second inverter (113) has an input terminal (115) and an OUT output node and a second transistor (125). The OUT_B output node of the first inverter is coupled to an input terminal of the second inverter, and the OUT node of the second inverter is coupled to an input terminal of the first inverter. The sense amplifier does not use a reference current; therefore, the sense amplifier does not need a reference current generator. The sense amplifier needs only one enable signal to reset a latch (110) of the sense amplifier. When coupled to a non-volatile memory element, voltages at the output nodes are indicative of a logic level of a bit stored in the non-volatile memory element.

Abstract: A device (200) includes a circuit (202) and a driver stage (204) therefor. The circuit includes two sub-circuits (231 and 232). The driver stage includes switcher logic (206) that produces signals that control switching on and off of the sub-circuits. The switcher logic also produces other signals in advance of the signals that control the switching of the sub-circuits. The driver stage includes delay compensations circuits (221 and 222), coupled to the switcher logic and to the circuit, that produce timing signals for the switcher logic. The timing signals are closely aligned with moments that a changing voltage at a node between the sub-circuits passes through threshold voltages. The timing signals compensate for all delays of signals through the device such that a period that both sub-circuits are off is minimized, while ensuring that both sub-circuits are not on at a same time.

Abstract: A refillable toothbrush and base assembly having a handle assembly, a hinge assembly, a head assembly, brush assembly, a toothpaste cartridge assembly, and a base assembly. The brush assembly is removably mounted to the head assembly. When not in use, the refillable toothbrush assembly rests on the base. A hinge assembly is integrally mounted to the handle assembly. The toothpaste cartridge assembly includes a toothpaste cartridge with an end cap, a plunger and a plunger actuator having a knob. The brush assembly has an internal channel. Upon the rotation of the knob, the toothpaste is forced to travels through the toothpaste cartridge assembly to exit at the brush. A user may rotate the head assembly, with the brush assembly mounted thereto, to a position where the brush assembly is housed within a channel and a cavity disposed at the handle assembly.

Abstract: A regulator (104) for a charge pump (102) includes a clock amplitude modulator (150) that changes voltage of a clock signal used in operation of the charge pump in response to changes in magnitude of output voltage of the change pump. The clock amplitude modulator is powered by an output of an auxiliary circuit (120). The output of the auxiliary circuit is at a higher voltage than an input voltage of the charge pump. A maximum amplitude of the voltage of the clock signal is higher than the input voltage of the charge pump.

Abstract: A regulator (104) for a charge pump (102) includes a clock amplitude modulator (150) that changes voltage of a clock signal used in operation of the charge pump in response to changes in magnitude of output voltage of the change pump. The clock amplitude modulator is powered by an output of an auxiliary circuit (120). The output of the auxiliary circuit is at a higher voltage than an input voltage of the charge pump. A maximum amplitude of the voltage of the clock signal is higher than the input voltage of the charge pump.

Abstract: A data processing system includes a brown-out detection circuit with a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal.

Abstract: A test structure (200) in an integrated circuit (100) includes a probe pad (210) disposed at a surface of a die (102) of the integrated circuit, a transmission gate (202) for connecting portions of an electronic circuit within the integrated circuit in response to a momentary signal applied to the probe pad, a first inverter (221) having an input coupled to the probe pad and having an output coupled to a control input of the transmission gate, and a second inverter (222) having an input coupled to an output of the first inverter and having an output coupled to another control input of the transmission gate. The output of the second inverter is coupled to the input of the first inverter. Upon power-up, the transmission gate is open. After the momentary signal is applied to the probe pad, the transmission gate closes and remains closed until power is disconnected.

Abstract: A low voltage detector (100) includes a power supply voltage monitor circuit (110) that produces a voltage VSP related to a first a power supply voltage, and a voltage generator (105), which includes a plurality of self-cascode MOSFET (SCM) structures (101-103) in a cascade configuration, that generates a reference voltage Vxm. A voltage comparator (140) outputs an output signal in response to a differential between Vxm and VSP, wherein Vxm and VSP have proportional to absolute temperature behavior (PTAT) over temperature with respect to a second power supply voltage. The output signal changes state when the first power supply voltage equals a trip point of the comparator. Each SCM structure is sized to provide a rate of change with temperature of the PTAT behavior of Vxm that matches a rate of change with temperature of the PTAT behavior of VSP.

Abstract: A low voltage detector (100) includes a voltage and current reference circuit (102); a power supply voltage monitor circuit (104), coupled to the voltage and current reference circuit and to a power supply; and a voltage comparator (106), coupled to the voltage and current reference circuit and to the power supply voltage monitor circuit. The voltage and current reference circuit includes a self-cascode MOSFET structure (SCM) (110) that produces a reference voltage. The power supply voltage monitoring circuit includes another SCM (140) that produces a monitor voltage, related to the power supply voltage. The reference voltage and the monitor voltage have a same behavior with changes in temperature, thereby allowing the trip point of the low voltage detector to minimally vary with temperature. The low voltage detector is disposed on an integrated circuit (101), and the transistors of the low voltage detector consist of only CMOS transistors.

Abstract: A data processing system includes a brown-out detection circuit with a first resistive element, a first transistor, a second transistor, and a comparator. The first resistive element has a first terminal coupled to a first power supply voltage terminal, and a second terminal. The first transistor has a first current electrode coupled to the second terminal of the first resistive element, a control electrode, and a second current electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a control electrode, and a second current electrode coupled to a second power supply voltage terminal. The comparator has a first input terminal coupled to the first terminal of the first resistive element, a second input terminal coupled to the second terminal of the first resistive element, and an output terminal for providing a brown-out detection signal.

Abstract: A bandgap voltage reference unit on an integrated circuit (101) includes a proportional-to-absolute-temperature (PTAT) current source (100) coupled to a bandgap voltage reference circuit (200) that includes a plurality of self-cascode MOSFET structures (201-204) that are cascaded together to form a PTAT voltage generator (205). The bandgap voltage reference circuit also includes a complementary-to-absolute-temperature (CTAT) device (260). A PTAT voltage from the PTAT voltage generator is added to a CTAT voltage from the CTAT device to produce an output voltage of the bandgap voltage reference unit, such that the output voltage is the bandgap voltage of the integrated circuit and such that the output voltage does not change with temperature.