Abstract: Methods and systems for fan speed control based on memory margin are disclosed. According to an aspect, a method includes determining an operating margin of a memory interface. The method also includes determining whether the operating margin of the memory interface meets a predetermined condition. Further, the method includes controlling a speed of a computing system cooling fan based on the operating margin in response to determining the operating margin meets the predetermined condition.

Abstract: A computer readable storage medium embodies program instructions executable by a processor to perform a method including identifying a product warranty for each of a plurality of flash memory devices within a system, wherein the product warranty includes a maximum number of writes and a maximum age, and tracking the number of writes and the age of each flash memory device. The method further includes determining, for each flash memory device, a number of pro rata writes remaining in the product warranty, which is determined as a number of writes remaining until the flash memory device reaches the maximum number of writes divided by an amount of time remaining until the flash memory reaches the maximum age. The method then causes data to be written to the flash memory device having the greatest number of pro rata writes remaining in the product warranty.

Abstract: A method includes identifying a product warranty for each of a plurality of flash memory devices within a system, wherein the product warranty includes a maximum number of writes and a maximum age, and tracking the number of writes made to each flash memory device and the age of each flash memory device. The method further includes determining, for each flash memory device, a number of pro rata writes remaining in the product warranty, which is determined as a number of writes remaining until the flash memory device reaches the maximum number of writes identified in the product warranty divided by an amount of time remaining until the flash memory reaches the maximum age identified in the product warranty. The method then causes data to be written to the flash memory device having the greatest number of pro rata writes remaining in the product warranty.

Abstract: A message is simultaneously broadcast to multiple systems on a 1-wire bus. A first addressed communication session is established between a microprocessor and a first 1-wire I/O expander via a 1-wire bus, where the first 1-wire I/O expander is electrically coupled to a first system. The first 1-wire I/O expander is placed into “fast access mode”, and then removed from the 1-wire bus by opening a switch to the 1-wire bus. A second addressed communication session is established between the microprocessor and a second 1-wire I/O expander before the switch recloses, where the second 1-wire I/O expander is electrically coupled to a second system. The second 1-wire I/O expander is then placed into “fast access mode”. In response to the timer expiring and the switch reclosing, an unaddressed message is broadcast from the microprocessor to the first and second systems via the first and second 1-wire I/O expanders.

Abstract: A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source.

Abstract: A computer program product includes a computer readable storage medium having program instructions embodied therewith, wherein the program instructions are executable by a processor to cause the processor to perform a method. The method comprises obtaining an activity level for each of a plurality of functions of an integrated circuit, wherein each function has a different physical location on the integrated circuit. The method further includes dynamically adjusting an amount of current supplied to the integrated circuit by each of a plurality of power stages of a DC voltage regulator to meet the current requirements of the plurality of functions and to control power losses between the power stages and the functions, wherein each power stage has a different physical location along a perimeter of the integrated circuit.

Abstract: Systems and methods for allocating memory usage based on voltage regulator efficiency are disclosed. According to an aspect, a method may include receiving a first efficiency value of a first voltage regulator associated with a first memory device among multiple memory devices. The method may also include receiving a second efficiency value of a second voltage regulator associated with a second memory device of the memory devices. The method may also include receiving a request to write data to one of the first memory devices and the second memory device. The method may also include determining whether to write the data to the first memory device or the second memory device based on the first and second efficiency values. Further, the method may include writing the data to the first memory device or the second memory device based on the determination.

Abstract: A method includes obtaining an activity level for each of a plurality of functions of an integrated circuit, wherein each function has a different physical location on the integrated circuit. The method further includes dynamically adjusting an amount of current supplied to the integrated circuit by each of a plurality of power stages of a DC voltage regulator to meet the current requirements of the plurality of functions and to control power losses between the power stages and the functions, wherein each power stage has a different physical location along a perimeter of the integrated circuit.

Abstract: Methods for modifying and ranking searches with actions based on prior search results and actions are disclosed herein. According to an aspect, a method comprises using at least one processor and memory determining an action associated with web content. Further, the method comprises receiving user input identifying search criteria. Further, the method, in response to determining that the search criteria is associated with the web content, comprises presenting search results associated with the search criteria and a user interface for initiating the action with respect to one or more of the search results.

Abstract: Systems and methods for modifying and ranking searches with actions based on prior search results and actions are disclosed herein. According to an aspect, a method comprises using at least one processor and memory determining an action associated with web content. Further, the method comprises receiving user input identifying search criteria. Further, the method, in response to determining that the search criteria is associated with the web content, comprises presenting search results associated with the search criteria and a user interface for initiating the action with respect to one or more of the search results.

Abstract: Detecting TIM between a heat sink and an integrated circuit, the heat sink including TIM detection points, each TIM detection point adapted to receive TIM upon installation of the heat sink, each TIM detection point including a TIM detection device configured to be activated upon contact with TIM, including: receiving, upon installation of the heat sink on the integrated circuit and the TIM, TIM in one or more of the TIM detection points; activating, by the TIM in each of the one or more TIM detection points receiving the TIM, a TIM detection device; and determining, by a TIM detection module in dependence upon the activations of the TIM detection devices, sufficiency of the TIM between the heat sink and the integrated circuit.

Abstract: A system comprises a plurality of fans, wherein each of the fans is configurable to run at a unique fan speed that is different from fan speeds of other fans from the plurality of fans. A plurality of variable-positioned devices, capable of being positioned at various locations within the system, are physically positioned such that airflow from one of the plurality of fans strikes a particular variable-positioned device. A plurality of anemometers, each of which is connected to a particular variable-positioned device, measure airflow across the variable-positioned devices. A system controller, which contains location information that identifies a physical position within the system of each of the plurality of fans, utilizes airflow readings from each of the anemometers to identify a physical location of each of the plurality of variable-positioned devices by matching physical locations of the fans to measured airflow across the variable-positioned devices.

Abstract: A method includes a wireless mobile communication device discovering a proximate wireless audio device, receiving a device name from the wireless audio device, and providing the device name to a content server. The method further includes the content server analyzing the device name to identify a location or activity, selecting content relevant to the identified location or activity, and providing the selected content to the wireless mobile communication device. Optionally, the location or activity may be a kitchen, garage or other room of a residence or a conference room or break room of a business. The selected content is preferably relevant to the location or activity, such as an advertisement for tools or lawn equipment responsive to the identified location being the garage.

Abstract: A chip package comprises: an IC substrate, wherein the IC substrate comprises at least one electronic device; a photovoltaic cell, wherein the photovoltaic cell generates an electrical current when exposed to light; a light blocking shield, wherein the light blocking shield prevents light from striking the photovoltaic cell only while the chip package is mounted on a circuit board, and wherein the light blocking shield ceases to prevent light from striking the photovoltaic cell upon the chip package being dismounted from the circuit board; and a disabling logic, wherein the electrical current, which is generated by the photovoltaic cell in response to the chip package being dismounted from the circuit board, causes the disabling logic to disable the IC substrate.

Abstract: A method includes a supervisory controller within a computer identifying a plurality of PCIe devices installed within the computer and identifying one or more configurable link width for each of the identified PCIe devices, wherein each of the identified PCIe devices is determined to be installed in a particular PCIe slot. The method further includes the supervisory controller granting a higher priority to a first one of the PCIe devices than to a second one of the PCIe devices, and the supervisory controller controlling the allocation of a fixed number of serial communication lanes from a processor to the plurality of PCIe devices, wherein the first PCIe device is allocated the maximum configurable link width identified for the first PCIe device and the second PCIe device is allocated a link width less than the maximum configurable link width identified for the second PCIe device.

Abstract: A computer program product includes program instructions executable by a processor, such as a supervisory controller within a computer to perform a method. The method includes identifying PCIe devices installed within the computer and identifying one or more configurable link width for each of the identified PCIe devices, wherein each PCIe device is determined to be installed in a particular PCIe slot. The method further includes granting a higher priority to a first one of the PCIe devices than to a second one of the PCIe devices, and controlling the allocation of a fixed number of serial communication lanes from a processor to the plurality of PCIe devices, wherein the first PCIe device is allocated the maximum configurable link width identified for the first PCIe device and the second PCIe device is allocated a link width less than the maximum configurable link width identified for the second PCIe device.

Abstract: According to one exemplary embodiment, a method for load optimization using cable-associated voltage drop is provided. The method may include receiving a plurality of tasks for processing by a plurality of electronic devices. The method may also include determining a power loss value for one or more power cables powering each of the plurality of electronic devices. The method may further include assigning the plurality of tasks to one or more of the plurality of electronic devices based on the power loss value for the one or more power cables powering each of the plurality of electronic devices.

Abstract: According to one exemplary embodiment, a method for reducing electrical component stress from power cycling is provided. The method may include receiving an indication associated with power cycling an electronic apparatus. The method may also include identifying, based on the received indication, a first one or more groups of electrical components that will not be powered off during the power cycling of the electronic apparatus. The method may further include identifying, based on the received indication, a second one or more groups of electrical components that will be powered off during the power cycling of the electronic apparatus. The method may finally include powering off the second one or more groups of electrical components.

Abstract: Detecting TIM between a heat sink and an integrated circuit, the heat sink including TIM detection points, each TIM detection point adapted to receive TIM upon installation of the heat sink, each TIM detection point including a TIM detection device configured to be activated upon contact with TIM, including: receiving, upon installation of the heat sink on the integrated circuit and the TIM, TIM in one or more of the TIM detection points; activating, by the TIM in each of the one or more TIM detection points receiving the TIM, a TIM detection device; and determining, by a TIM detection module in dependence upon the activations of the TIM detection devices, sufficiency of the TIM between the heat sink and the integrated circuit.

Abstract: Systems and methods for altering movement of mobile communication devices based on determined movements are disclosed. According to an aspect, a method may include determining movement of a mobile communication device. The method may also include determining whether the movement of the mobile communication device meets a predetermined criterion. Further, the method may include controlling a mechanism of the mobile communication device for altering movement of the mobile communication device in response to determining that the movement meets the predetermined criterion.