Patents by Inventor Madhava Rao Yalamanchili
Madhava Rao Yalamanchili has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9177864Abstract: Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.Type: GrantFiled: September 5, 2014Date of Patent: November 3, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Todd Egan, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 9126285Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.Type: GrantFiled: June 15, 2011Date of Patent: September 8, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
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Patent number: 9129904Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.Type: GrantFiled: June 15, 2011Date of Patent: September 8, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
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Patent number: 9105710Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.Type: GrantFiled: November 26, 2013Date of Patent: August 11, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Madhava Rao Yalamanchili, Ajay Kumar, Jungrae Park
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Publication number: 20150200119Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.Type: ApplicationFiled: March 27, 2015Publication date: July 16, 2015Inventors: Brad EATON, Saravjeet SINGH, Wei-Sheng LEI, Madhava Rao YALAMANCHILI, Tong LIU, Ajay KUMAR
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Patent number: 9054176Abstract: Methods of dicing substrates by both laser scribing and plasma etching are disclosed. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.Type: GrantFiled: September 10, 2013Date of Patent: June 9, 2015Assignee: APPLIED MATERIALS, INC.Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
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Patent number: 9048309Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.Type: GrantFiled: June 13, 2013Date of Patent: June 2, 2015Assignee: Applied Materials, Inc.Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20150122419Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.Type: ApplicationFiled: January 12, 2015Publication date: May 7, 2015Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 9023227Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).Type: GrantFiled: May 25, 2012Date of Patent: May 5, 2015Assignee: Applied Materials, Inc.Inventors: Jivko Dinev, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 9018079Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, the exposed regions of the semiconductor wafer are cleaned with a plasma process reactive to the exposed regions of the semiconductor wafer. Subsequent to cleaning the exposed regions of the semiconductor wafer, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.Type: GrantFiled: January 29, 2014Date of Patent: April 28, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8993414Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.Type: GrantFiled: July 10, 2013Date of Patent: March 31, 2015Assignee: Applied Materials, Inc.Inventors: Brad Eaton, Saravjeet Singh, Wei-Sheng Lei, Madhava Rao Yalamanchili, Tong Liu, Ajay Kumar
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Patent number: 8980726Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 ?m thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging.Type: GrantFiled: January 17, 2014Date of Patent: March 17, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Aparna Iyer, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8975162Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside.Type: GrantFiled: December 3, 2013Date of Patent: March 10, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Saravjeet Singh, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20150064878Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.Type: ApplicationFiled: November 26, 2013Publication date: March 5, 2015Applicant: APPLIED MATERIALS, INC.Inventors: Wei-Sheng LEI, Brad EATON, Aparna IYER, Madhava Rao YALAMANCHILI, Ajay KUMAR, Jungrae PARK
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Patent number: 8969177Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.Type: GrantFiled: June 13, 2013Date of Patent: March 3, 2015Assignee: Applied Materials, Inc.Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8951819Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a split-beam laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.Type: GrantFiled: July 11, 2011Date of Patent: February 10, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, Aparna Iyer
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Publication number: 20150037915Abstract: In embodiments, a method of laser scribing a mask disposed over a semiconductor wafer includes determining a height of the semiconductor over which a mask layer is disposed prior to laser scribing the mask layer. In one embodiment the method includes: determining a height of the semiconductor wafer under the mask in a dicing street using an optical sensor and patterning the mask with a laser scribing process. The laser scribing process focuses a scribing laser beam at a plane corresponding to the determined height of the semiconductor wafer in the dicing street. Examples of determining the height of the semiconductor wafer can include directing a laser beam to the dicing street of the semiconductor wafer, which is transmitted through the mask and reflected from the wafer, and identifying an image on a surface of the wafer under the mask with a camera.Type: ApplicationFiled: September 24, 2013Publication date: February 5, 2015Inventors: Wei-Sheng LEI, Brad Eaton, Apama IYER, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8946057Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films is described. In an example, a method includes forming a mask above the semiconductor wafer. The semiconductor wafer is coupled to a carrier substrate by a UV-curable adhesive film. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The UV-curable adhesive film is then irradiated with ultra-violet (UV) light. The singulated integrated circuits are then detached from the carrier substrate.Type: GrantFiled: March 20, 2013Date of Patent: February 3, 2015Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Mohammad K. Chowdhury, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20150028446Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.Type: ApplicationFiled: October 13, 2014Publication date: January 29, 2015Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20150011073Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a hybrid plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch with a plasma based on a combination of NF3 and CF4. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.Type: ApplicationFiled: June 2, 2014Publication date: January 8, 2015Inventors: Wei-Sheng Lei, Tong Liu, Madhava Rao Yalamanchili, Brad Eaton, Aparna Iyer, Ajay Kumar