Patents by Inventor Maitreyee Mahajani
Maitreyee Mahajani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9269584Abstract: Provided are methods of depositing N-Metals onto a substrate. Methods include first depositing an initiation layer. The initiation layer may comprise or consist of cobalt, tantalum, nickel, titanium or TaAlC. These initiation layers can be used to deposit TaCx.Type: GrantFiled: June 18, 2012Date of Patent: February 23, 2016Assignee: Applied Materials, Inc.Inventors: Seshadri Ganguli, Xinliang Lu, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Mei Chang
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Patent number: 9048183Abstract: Embodiments provide methods for depositing metal-containing materials. The methods include deposition processes that form metal, metal carbide, metal silicide, metal nitride, and metal carbide derivatives by a vapor deposition process, including thermal decomposition, CVD, pulsed-CVD, or ALD. A method for processing a substrate is provided which includes depositing a dielectric material forming a feature definition in the dielectric material, depositing a work function material conformally on the sidewalls and bottom of the feature definition, and depositing a metal gate fill material on the work function material to fill the feature definition, wherein the work function material is deposited by reacting at least one metal-halide precursor having the formula MXY, wherein M is tantalum, hafnium, titanium, and lanthanum, X is a halide selected from the group of fluorine, chlorine, bromine, or iodine, and y is from 3 to 5.Type: GrantFiled: January 3, 2014Date of Patent: June 2, 2015Assignee: APPLIED MATERIALS, INC.Inventors: Seshadri Ganguli, Srinivas Gandikota, Yu Lei, Xinliang Lu, Sang Ho Yu, Hoon Kim, Paul F. Ma, Mei Chang, Maitreyee Mahajani, Patricia M. Liu
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Patent number: 8987080Abstract: Provided are methods for making metal gates suitable for FinFET structures. The methods described herein generally involve forming a high-k dielectric material on a semiconductor substrate; depositing a high-k dielectric cap layer over the high-k dielectric material; depositing a PMOS work function layer having a positive work function value; depositing an NMOS work function layer; depositing an NMOS work function cap layer over the NMOS work function layer; removing at least a portion of the PMOS work function layer or at least a portion of the NMOS work function layer; and depositing a fill layer. Depositing a high-k dielectric cap layer, depositing a PMOS work function layer or depositing a NMOS work function cap layer may comprise atomic layer deposition of TiN, TiSiN, or TiAlN. Either PMOS or NMOS may be deposited first.Type: GrantFiled: April 18, 2013Date of Patent: March 24, 2015Assignee: Applied Materials, Inc.Inventors: Xinliang Lu, Seshadri Ganguli, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Yu Lei, Xinyu Fu, Wei Tang, Srinivas Gandikota
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Patent number: 8951861Abstract: Methods are provided for forming a monolithic three dimensional memory array. An example method includes: (a) forming a first plurality of substantially parallel, substantially coplanar conductors above a substrate; (b) forming a first plurality of semiconductor elements above the first plurality of substantially parallel, substantially coplanar conductors; and (c) forming a second plurality of substantially parallel, substantially coplanar conductors above the first plurality of semiconductor elements. Each of the first plurality of semiconductor elements includes a first heavily doped layer having a first conductivity type, a second lightly doped layer on and in contact with the first heavily doped layer, and a third heavily doped layer on and in contact with the second lightly doped layer. The third heavily doped layer has a second conductivity type opposite the first conductivity type. Numerous other aspects are provided.Type: GrantFiled: February 25, 2013Date of Patent: February 10, 2015Assignee: SanDisk 3D LLCInventors: Scott Brad Herner, Maitreyee Mahajani
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Patent number: 8895443Abstract: Provided are methods of depositing N-Metals onto a substrate. Some methods comprise providing an initiation layer of TaM or TiM layer on a substrate, wherein M is selected from aluminum, carbon, noble metals, gallium, silicon, germanium and combinations thereof; and exposing the substrate having the TaM or TiM layer to a treatment process comprising soaking the surface of the substrate with a reducing agent to provided a treated initiation layer.Type: GrantFiled: June 18, 2012Date of Patent: November 25, 2014Assignee: Applied Materials, Inc.Inventors: Seshadri Ganguli, Xinliang Lu, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Mei Chang
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Patent number: 8778816Abstract: Methods for preparing a substrate for a subsequent film formation process are described. Methods for preparing a substrate for a subsequent film formation process, without immersion in an aqueous solution, are also described. A process is described that includes disposing a substrate into a process chamber, the substrate having a thermal oxide surface with substantially no reactive surface terminations. The thermal oxide surface is exposed to a partial pressure of water below the saturated vapor pressure at a temperature of the substrate to convert the dense thermal oxide with substantially no reactive surface terminations to a surface with hydroxyl surface terminations. This can occur in the presence of a Lewis base such as ammonia.Type: GrantFiled: July 27, 2011Date of Patent: July 15, 2014Assignee: Applied Materials, Inc.Inventors: Tatsuya E. Sato, David Thompson, Jeffrey W. Anthis, Vladimir Zubkov, Steven Verhaverbeke, Roman Gouk, Maitreyee Mahajani, Patricia M. Liu, Malcolm J. Bevan
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Publication number: 20140120712Abstract: Embodiments provide methods for depositing metal-containing materials. The methods include deposition processes that form metal, metal carbide, metal silicide, metal nitride, and metal carbide derivatives by a vapor deposition process, including thermal decomposition, CVD, pulsed-CVD, or ALD. A method for processing a substrate is provided which includes depositing a dielectric material forming a feature definition in the dielectric material, depositing a work function material conformally on the sidewalls and bottom of the feature definition, and depositing a metal gate fill material on the work function material to fill the feature definition, wherein the work function material is deposited by reacting at least one metal-halide precursor having the formula MXY, wherein M is tantalum, hafnium, titanium, and lanthanum, X is a halide selected from the group of fluorine, chlorine, bromine, or iodine, and y is from 3 to 5.Type: ApplicationFiled: January 3, 2014Publication date: May 1, 2014Applicant: APPLIED MATERIALS, INC.Inventors: Seshadri GANGULI, Srinivas GANDIKOTA, Yu LEI, Xinliang LU, Sang Ho YU, Hoon KIM, Paul F. MA, Mei CHANG, Maitreyee MAHAJANI, Patricia M. LIU
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Patent number: 8642468Abstract: Embodiments of the invention generally provide methods for depositing metal-containing materials and compositions thereof. The methods include deposition processes that form metal, metal carbide, metal silicide, metal nitride, and metal carbide derivatives by a vapor deposition process, including thermal decomposition, CVD, pulsed-CVD, or ALD.Type: GrantFiled: April 25, 2011Date of Patent: February 4, 2014Assignee: Applied Materials, Inc.Inventors: Seshadri Ganguli, Srinivas Gandikota, Yu Lei, Xinliang Lu, Sang Ho Yu, Hoon Kim, Paul F. Ma, Mei Chang, Maitreyee Mahajani, Patricia M. Liu
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Publication number: 20140023794Abstract: Provided are methods and apparatus for low temperature atomic layer deposition of a densified film. A low temperature film is formed and densified by exposure to one or more of a plasma or radical species. The resulting densified film has superior properties to low temperature films formed without densification.Type: ApplicationFiled: July 23, 2013Publication date: January 23, 2014Inventors: Maitreyee Mahajani, Steven D. Marcus, Li-Qun Xia, Mihaela Balseanu, Victor Nguyen, Ning Li, Jingjing Liu, Sukti Chatterjee, Timothy W. Weidman
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Patent number: 8633119Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.Type: GrantFiled: July 25, 2011Date of Patent: January 21, 2014Assignee: Applied Materials, Inc.Inventors: Tatsuya E. Sato, Maitreyee Mahajani
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Patent number: 8633114Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.Type: GrantFiled: May 10, 2011Date of Patent: January 21, 2014Assignee: Applied Materials, Inc.Inventors: Tatsuya E. Sato, Maitreyee Mahajani
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Patent number: 8592305Abstract: Provided are methods of providing aluminum-doped TaSix films. Doping TaSix films allows for the tuning of the work function value to make the TaSix film better suited as an N-metal for NMOS applications. One such method relates to soaking a TaSix film with an aluminum-containing compound. Another method relates to depositing a TaSix film, soaking with an aluminum-containing compound, and repeating for a thicker film. A third method relates to depositing an aluminum-doped TaSix film using tantalum, aluminum and silicon precursors.Type: GrantFiled: November 15, 2011Date of Patent: November 26, 2013Assignee: Applied Materials, Inc.Inventors: Xinliang Lu, Seshadri Ganguli, Shih Chung Chen, Atif Noori, Maitreyee Mahajani, Mei Chang
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Publication number: 20130295759Abstract: Provided are methods for making metal gates suitable for FinFET structures. The methods described herein generally involve forming a high-k dielectric material on a semiconductor substrate; depositing a high-k dielectric cap layer over the high-k dielectric material; depositing a PMOS work function layer having a positive work function value; depositing an NMOS work function layer; depositing an NMOS work function cap layer over the NMOS work function layer; removing at least a portion of the PMOS work function layer or at least a portion of the NMOS work function layer; and depositing a fill layer. Depositing a high-k dielectric cap layer, depositing a PMOS work function layer or depositing a NMOS work function cap layer may comprise atomic layer deposition of TiN, TiSiN, or TiAlN. Either PMOS or NMOS may be deposited first.Type: ApplicationFiled: April 18, 2013Publication date: November 7, 2013Inventors: Xinliang Lu, Seshadri Ganguli, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Yu Lei, Xinyu Fu, Wei Tang, Srinivas Gandikota
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Publication number: 20130122697Abstract: Provided are methods of providing aluminum-doped TaSix films. Doping TaSix films allows for the tuning of the work function value to make the TaSix film better suited as an N-metal for NMOS applications. One such method relates to soaking a TaSix film with an aluminum-containing compound. Another method relates to depositing a TaSix film, soaking with an aluminum-containing compound, and repeating for a thicker film. A third method relates to depositing an aluminum-doped TaSix film using tantalum, aluminum and silicon precursors.Type: ApplicationFiled: November 15, 2011Publication date: May 16, 2013Applicant: Applied Materials, Inc.Inventors: Xinliang Lu, Seshadri Ganguli, Michael S. Chen, Atif Noori, Shih Chung Chen, Maitreyee Mahajani, Mei Chang
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Patent number: 8383478Abstract: Nonvolatile memory cells and methods of forming the same are provided, the methods including forming a first conductor at a first height above a substrate; forming a first pillar-shaped semiconductor element above the first conductor, wherein the first pillar-shaped semiconductor element comprises a first heavily doped layer of a first conductivity type, a second lightly doped layer above and in contact with the first heavily doped layer, and a third heavily doped layer of a second conductivity type above and in contact with the second lightly doped layer, the second conductivity type opposite the first conductivity type; forming a first dielectric antifuse above the third heavily doped layer of the first pillar-shaped semiconductor element; and forming a second conductor above the first dielectric antifuse.Type: GrantFiled: August 1, 2011Date of Patent: February 26, 2013Assignee: SanDisk 3D LLCInventors: Scott Brad Herner, Maitreyee Mahajani
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Patent number: 8361910Abstract: Embodiments of the invention provide methods for forming dielectric materials on a substrate. In one embodiment, a method includes exposing a substrate surface to a first oxidizing gas during a pretreatment process, wherein the first oxidizing gas contains a mixture of ozone and oxygen having an ozone concentration within a range from about 1 atomic percent to about 50 atomic percent and forming a hafnium-containing material on the substrate surface by exposing the substrate surface sequentially to a deposition gas and a second oxidizing gas during an atomic layer deposition (ALD) process, wherein the deposition gas contains a hafnium precursor, the second oxidizing gas contains water, and the hafnium-containing material has a thickness within a range from about 5 ? to about 300 ?. In one example, the hafnium-containing material contains hafnium oxide having the chemical formula of HfOx, whereas x is less than 2, such as about 1.8.Type: GrantFiled: June 30, 2011Date of Patent: January 29, 2013Assignee: Applied Materials, Inc.Inventor: Maitreyee Mahajani
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Publication number: 20120322262Abstract: Provided are methods of depositing N-Metals onto a substrate. Methods include first depositing an initiation layer. The initiation layer may comprise or consist of cobalt, tantalum, nickel, titanium or TaAlC. These initiation layers can be used to deposit TaCx.Type: ApplicationFiled: June 18, 2012Publication date: December 20, 2012Applicant: Applied Materials, Inc.Inventors: Seshadri Ganguli, Xinliang Lu, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Mei Chang
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Publication number: 20120322250Abstract: Provided are methods of depositing N-Metals onto a substrate. Some methods comprise providing an initiation layer of TaM or TiM layer on a substrate, wherein M is selected from aluminum, carbon, noble metals, gallium, silicon, germanium and combinations thereof; and exposing the substrate having the TaM or TiM layer to a treatment process comprising soaking the surface of the substrate with a reducing agent to provided a treated initiation layer.Type: ApplicationFiled: June 18, 2012Publication date: December 20, 2012Applicant: Applied Materials, Inc.Inventors: Seshadri Ganguli, Xinliang Lu, Atif Noori, Maitreyee Mahajani, Shih Chung Chen, Mei Chang
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Publication number: 20120289052Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.Type: ApplicationFiled: May 10, 2011Publication date: November 15, 2012Applicant: APPLIED MATERIALS, INC.Inventors: TATSUYA E. SATO, MAITREYEE MAHAJANI
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Publication number: 20120289063Abstract: Provided are methods for depositing a high-k dielectric film on a substrate. The methods comprise annealing a substrate after cleaning the surface to create dangling bonds and depositing the high-k dielectric film on the annealed surface.Type: ApplicationFiled: July 25, 2011Publication date: November 15, 2012Applicant: Applied Materials, Inc.Inventors: Tatsuya E. Sato, Maitreyee Mahajani