Patents by Inventor Martin Brox
Martin Brox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11508430Abstract: Methods, systems, and devices for a data circuit for a low swing data bus are described. An apparatus may include a data bus that may transfer data at a first voltage different than a second voltage that is associated with one or more components of the memory array. A transistor, coupled with the data bus, may receive the second voltage and send a third voltage. A first in first out (FIFO), coupled with the transistor, may receive the third voltage from the transistor. The FIFO circuit may include one or more precharge components that drive an input voltage of the FIFO circuit to the second voltage associated with the one or more components of the memory array based on receiving the third voltage.Type: GrantFiled: March 26, 2021Date of Patent: November 22, 2022Assignee: Micron Technology, Inc.Inventor: Martin Brox
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Patent number: 11500794Abstract: Systems, apparatuses, and methods for training procedures on reference voltages and sampling times associated with symbols communicated with a memory device are described. The training procedures may be configured to compensate for variations that may occur in different symbols of a signal. For example, an individual training operation may be performed for each reference voltage within a first unit interval. These individual training operations may allow a reference voltage of the first unit interval to be positionable independent of other reference voltages in the same unit interval or in different unit intervals. In another example, an individual training operation may be performed for the sampling time associated with a reference voltage. These individual training operations may allow a sampling time associated with a reference voltage in the first unit interval to be positionable independent of other sampling times in the same unit interval or in different unit intervals.Type: GrantFiled: April 27, 2021Date of Patent: November 15, 2022Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Thomas Hein, Martin Brox, Wolfgang Anton Spirkl, Michael Dieter Richter
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Patent number: 11494258Abstract: Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).Type: GrantFiled: September 27, 2021Date of Patent: November 8, 2022Assignee: Micron Technology, Inc.Inventors: Michael Dieter Richter, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Peter Mayer
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Publication number: 20220334915Abstract: Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal modulated using a first modulation scheme and communicate a second signal that is based on the first signal and that is modulated using a second modulation scheme. The first modulation scheme may include a first quantity of voltage levels that span a first range of voltages, and the second modulation scheme may include a second quantity of voltage levels that span a second range of voltages different than (e.g., smaller than) the first range of voltages. The first signal may include write data carried over a data channel, and the second signal may include error detection information based on the write data that is carried over an error detection channel.Type: ApplicationFiled: July 5, 2022Publication date: October 20, 2022Inventors: Martin Brox, Peter Mayer, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Timothy M. Hollis, Roy E. Greeff
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Publication number: 20220310149Abstract: Methods, systems, and devices for a data circuit for a low swing data bus are described. An apparatus may include a data bus that may transfer data at a first voltage different than a second voltage that is associated with one or more components of the memory array. A transistor, coupled with the data bus, may receive the second voltage and send a third voltage. A first in first out (FIFO), coupled with the transistor, may receive the third voltage from the transistor. The FIFO circuit may include one or more precharge components that drive an input voltage of the FIFO circuit to the second voltage associated with the one or more components of the memory array based on receiving the third voltage.Type: ApplicationFiled: March 26, 2021Publication date: September 29, 2022Inventor: Martin Brox
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Patent number: 11449249Abstract: Methods, systems, and devices for memory operations that support configuring a channel, such as a command/address (C/A) channel, are described. A configuration of a C/A channel may be dynamically adapted based on power saving considerations, control information execution latency, or both. Configuring a C/A channel may include determining a quantity of pins, or a quantity of cycles, both for communicating control information over the C/A channel. The quantity of pins may be determined based on previous control information transmissions, characteristics of a memory device, or predicted control information transmissions, or any combination thereof in some cases. The determined quantity of pins, quantity of cycles, or both may be explicitly or implicitly indicated to other devices (e.g., that use the C/A channel).Type: GrantFiled: November 5, 2019Date of Patent: September 20, 2022Assignee: Micron Technology, Inc.Inventors: Michael Dieter Richter, Wolfgang Anton Spirkl, Thomas Hein, Peter Mayer, Martin Brox
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Patent number: 11443779Abstract: Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.Type: GrantFiled: April 27, 2021Date of Patent: September 13, 2022Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Wolfgang Anton Spirkl, Michael Dieter Richter, Martin Brox, Thomas Hein
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Patent number: 11437112Abstract: Methods, systems, and devices for testing of multi-level signaling associated with a memory device are described. A tester may be used to test one or more operations of a memory device. The memory device may be configured to communicate data using a modulation scheme that includes three or more symbols. The tester may be configured to communicate data using a modulation scheme that includes three or fewer symbols. Techniques for testing the memory device using such a tester are described.Type: GrantFiled: November 12, 2019Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Wolfgang Anton Spirkl, Michael Dieter Richter, Thomas Hein, Peter Mayer, Martin Brox
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Patent number: 11437086Abstract: Methods, systems, and devices for phase clock correction are described. The clock correction may, in some examples, include two stages of duty cycle adjustment. In a first stage, the duty cycles of multiple clock signals may be adjusted. These clock signals may be based on an input clock signal and its complement. The duty cycle adjustment provided to a clock signal during this stage may be based on a difference between the duty cycle of the clock signal before adjustment and the duty cycle of another clock signal. In the second stage, the duty cycle of the input clock signal and its complement may be adjusted. The duty cycle adjustment provided to the input clock signal and/or its complement may be based on clock signals generated from the multiple clock signals after their duty cycles have been adjusted.Type: GrantFiled: July 13, 2021Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Martin Brox, Maksim Kuzmenka
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Patent number: 11409354Abstract: Methods, systems, and devices for multi-voltage operation for driving a multi-mode channel are described. A transmitting device and a receiving device may be coupled via a channel, and the channel may support multiple modes such as a terminated mode and an unterminated mode. A driver may be coupled with the channel, and a voltage supply for the driver may be adjusted based on the mode of the channel, such as based on whether the channel is terminated or unterminated. Adjusting the voltage supply may result in similar or otherwise desirable voltage levels on the channel for each mode of the channel.Type: GrantFiled: April 15, 2020Date of Patent: August 9, 2022Assignee: Micron Technology, Inc.Inventors: Martin Brox, Thomas Hein
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Patent number: 11409595Abstract: Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal modulated using a first modulation scheme and communicate a second signal that is based on the first signal and that is modulated using a second modulation scheme. The first modulation scheme may include a first quantity of voltage levels that span a first range of voltages, and the second modulation scheme may include a second quantity of voltage levels that span a second range of voltages different than (e.g., smaller than) the first range of voltages. The first signal may include write data carried over a data channel, and the second signal may include error detection information based on the write data that is carried over an error detection channel.Type: GrantFiled: January 15, 2020Date of Patent: August 9, 2022Assignee: Micron Technology, Inc.Inventors: Martin Brox, Peter Mayer, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Timothy M. Hollis, Roy E. Greeff
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Publication number: 20220245026Abstract: Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations may generate one or more bits of CRC output per symbol of an associated signal and the output may be transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process may be performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process may be configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.Type: ApplicationFiled: April 21, 2022Publication date: August 4, 2022Inventors: Stefan Dietrich, Martin Brox, Michael Dieter Richter, Thomas Hein, Ronny Schneider, Natalija Jovanovic
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Publication number: 20220206705Abstract: Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may determine a value for a parameter for operating the memory device—such as a timing, voltage, or frequency parameter—based on the temperature of the memory device. The host device may transmit signaling to the memory device or another component of the system based on the value of the parameter. In some cases, the host device may determine the temperature of the memory device based on an indication (e.g., provided by the memory device). In some cases, the host device may determine the temperature of the memory device based on a temperature of the host device or a temperature of another component of the system.Type: ApplicationFiled: March 17, 2022Publication date: June 30, 2022Inventors: Peter Mayer, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Michael Dieter Richter
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Publication number: 20220171575Abstract: Methods, systems, and devices for controlled and mode-dependent heating of a memory device are described. In various examples, a memory device or an apparatus that includes a memory device may have circuitry configured to heat the memory device. The circuitry configured to heat the memory device may be activated, deactivated, or otherwise operated based on an indication of a temperature (e.g., of the memory device). In some examples, activating or otherwise operating the circuitry configured to heat the memory device may be based on an operating mode (e.g., of the memory device), which may be associated with certain access operations or operational states (e.g., of the memory device). Various operations or operating modes (e.g., of the memory device) may also be based on indications of a temperature (e.g., of the memory device).Type: ApplicationFiled: February 22, 2022Publication date: June 2, 2022Inventors: Peter Mayer, Michael Dieter Richter, Martin Brox, Wolfgang Anton Spirkl, Thomas Hein
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Publication number: 20220172757Abstract: Systems, methods, and apparatuses for offset cancellation are described. A memory device may determine that a channel is in a state that interrupts an active termination of the channel and enable the calibration of a reference voltage (e.g., by the memory device). For example, a channel used for data communications with a second device (e.g., a controller) may initially be in a state of active termination. The memory device may determine that the channel has transitioned to another state that interrupts the active termination. While the channel is in the other state, the memory device may calibrate a reference voltage of a receiver by transmitting calibration signals on the channel and detecting an offset associated with a reference voltage. The memory device may use the detected offset and the reference voltage to identify signals transmitted to the memory device over the channel.Type: ApplicationFiled: February 10, 2022Publication date: June 2, 2022Inventors: Martin Brox, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Peter Mayer
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Publication number: 20220173827Abstract: Methods, systems, and devices for replacement scheme for a pulse amplitude modulated bus are described. A device may receive a signal indicative of a set of data associated with a multi-level modulation scheme that includes three or more levels. The device may determine, based on the signal, a first quantity of symbols corresponding to a first level of the multi-level modulation scheme and a second quantity of symbols corresponding to a second level of the multi-level modulation scheme. And the device may modify the signal, based on a sum of the first quantity and the second quantity satisfying a threshold, to replace one or more of the symbols corresponding to the first level with a respective symbol corresponding to a third level of the multi-level modulation scheme.Type: ApplicationFiled: November 24, 2021Publication date: June 2, 2022Inventor: Martin Brox
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Patent number: 11349526Abstract: Methods, systems, and devices for pre-distortion of multi-level signaling are described. A device may identify two multi-level signals that are to be transmitted over two transmission lines at the same time. The device may estimate the crosstalk expected to be caused by one of the multi-level signals on the other during propagation. Based on the expected crosstalk, the device may generate a signal that compensates for the expected crosstalk. In some examples, the signal may be a combination of the first signal and a cancelation signal. In some examples, once the compensated signal has been generated, it is transmitted over its respective transmission line at the same time that the other multi-level is transmitted over its respective transmission line.Type: GrantFiled: October 23, 2020Date of Patent: May 31, 2022Assignee: Micron Technology, Inc.Inventors: Wolfgang Anton Spirkl, Michael Dieter Richter, Martin Brox, Peter Mayer, Thomas Hein
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Patent number: 11327832Abstract: Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations generate one or more bits of CRC output per symbol of an associated signal and the output are transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process is performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process is configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.Type: GrantFiled: January 15, 2021Date of Patent: May 10, 2022Assignee: Micron Technology, Inc.Inventors: Stefan Dietrich, Martin Brox, Michael Dieter Richter, Thomas Hein, Ronny Schneider, Natalija Jovanovic
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Patent number: 11321008Abstract: Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may determine a value for a parameter for operating the memory device—such as a timing, voltage, or frequency parameter—based on the temperature of the memory device. The host device may transmit signaling to the memory device or another component of the system based on the value of the parameter. In some cases, the host device may determine the temperature of the memory device based on an indication (e.g., provided by the memory device). In some cases, the host device may determine the temperature of the memory device based on a temperature of the host device or a temperature of another component of the system.Type: GrantFiled: November 5, 2019Date of Patent: May 3, 2022Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Michael Dieter Richter
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Publication number: 20220122653Abstract: Methods, systems, and devices for controlled and mode-dependent heating of a memory device are described. In various examples, a memory device or an apparatus that includes a memory device may have circuitry configured to heat the memory device. The circuitry configured to heat the memory device may be activated, deactivated, or otherwise operated based on an indication of a temperature (e.g., of the memory device). In some examples, activating or otherwise operating the circuitry configured to heat the memory device may be based on an operating mode (e.g., of the memory device), which may be associated with certain access operations or operational states (e.g., of the memory device). Various operations or operating modes (e.g., of the memory device) may also be based on indications of a temperature (e.g., of the memory device).Type: ApplicationFiled: December 29, 2021Publication date: April 21, 2022Inventors: Peter Mayer, Michael Dieter Richter, Martin Brox, Wolfgang Anton Spirkl, Thomas Hein