Patents by Inventor Masakazu Ikeda

Masakazu Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8582404
    Abstract: Obtain an expanded address without altering the bit number of an address which is embedded in a wobble. Generate a virtual bit which is not recorded on a disc, and which is expressed by the disparity from the rules and the presence or absence of information embedded in part or all of the wobble address.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: November 12, 2013
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Publication number: 20130213228
    Abstract: The hydrogen separation membrane module according to the present invention is used for separating hydrogen from a gas to be treated containing hydrogen, and is provided with a tubular hydrogen separation membrane being selectively permeable to hydrogen, a casing for the hydrogen separation membrane, an insertion member being arranged on the inside of the hydrogen separation membrane and having an outer surface that defines a flow path of the gas to be treated together with an inner surface of the hydrogen separation membrane, a gas supply port for supplying the gas to be treated to the inside of the hydrogen separation membrane, a gas discharge port for discharging a non-permeating gas that does not permeate the hydrogen separation membrane, from a downstream side of the flow path, and a hydrogen discharge port provided in the casing, for discharging hydrogen having permeated the hydrogen separation membrane.
    Type: Application
    Filed: May 31, 2011
    Publication date: August 22, 2013
    Applicants: JAPAN PETROLEUM ENERGY CENTER, JX NIPPON OIL & ENERGY CORPORATION
    Inventors: Masakazu Ikeda, Shunsuke Maekawa, Kaori Takano
  • Patent number: 8514681
    Abstract: A recording medium, an address generating method, an address detection method and a recording and reproduction apparatus capable of extending the wobble address without any considerable wobble restructuring are disclosed. Virtual bits not recorded in the disc and expressed by the difference of the rule or the presence or absence of the information embedded in a part or the whole of the wobble address are generated. Thus, the extended address can be obtained without changing the number of bits of the address embedded in the wobble.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: August 20, 2013
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Patent number: 8488437
    Abstract: In a recording medium, an extension address is obtained without changing the number of bits of the address embedded in the wobble. The wobble address is partially or wholly encoded to embed the address information. At the time of reproducing the address information, the original address information is obtained by restoring the embedded information by the decoding process.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: July 16, 2013
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Akio Fukushima, Masakazu Ikeda, Koichi Hirose, Koichiro Nishimura
  • Publication number: 20130026946
    Abstract: An LED drive circuit is an LED dive circuit that receives an alternating voltage to drive an LED, and includes a current remove portion that removes a current from a current supply line that supplies an LED drive current to the LED. If an input current to the LED drive circuit is an unnecessary current, the LED does not light because of current removal by the current remove portion. If the input current to the LED drive circuit turns into the LED drive current from the unnecessary current, the current remove portion decreases the amount of current removed.
    Type: Application
    Filed: August 6, 2012
    Publication date: January 31, 2013
    Inventors: Yasuhiro MARUYAMA, Hiroyuki SHOJI, Mitsuru MARIYAMA, Masakazu IKEDA, Hirohisa WARITA, Katsumi INABA, Naoki FUKUNAGA
  • Patent number: 8331214
    Abstract: In a recording medium, an extension address is obtained without changing the number of bits of the address embedded in the wobble. The wobble address is partially or wholly encoded to embed the address information. At the time of reproducing the address information, the original address information is obtained by restoring the embedded information by the decoding process.
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: December 11, 2012
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Akio Fukushima, Masakazu Ikeda, Koichi Hirose, Koichiro Nishimura
  • Publication number: 20120307609
    Abstract: Obtain an expanded address without altering the bit number of an address which is embedded in a wobble. Generate a virtual bit which is not recorded on a disc, and which is expressed by the disparity from the rules and the presence or absence of information embedded in part or all of the wobble address.
    Type: Application
    Filed: November 10, 2010
    Publication date: December 6, 2012
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Publication number: 20120307607
    Abstract: Obtain an expanded address without altering the bit number of an address which is embedded in a wobble. Generate a virtual bit which is not recorded on a disc, and which is expressed by the disparity from the rules and the presence or absence of information embedded in part or all of the wobble address.
    Type: Application
    Filed: November 10, 2010
    Publication date: December 6, 2012
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Publication number: 20120306394
    Abstract: A switching power supply circuit includes a full-wave rectification circuit that performs full-wave rectification of an AC input voltage so as to generate a primary voltage, a transformer that transforms the primary voltage into a secondary voltage utilizing electromagnetic induction between first and second isolated windings, a rectifying and smoothing circuit that generates a DC output voltage from the secondary voltage so as to supply the DC output voltage to a load, a primary current control circuit that performs on/off control of primary current based on a result of comparison between a primary current detection voltage corresponding to the primary current flowing in the first winding and a first reference voltage, and a reference voltage correction circuit for monitoring an on-duty ratio of secondary current flowing in the second winding so as to correct the first reference voltage.
    Type: Application
    Filed: June 5, 2012
    Publication date: December 6, 2012
    Inventor: Masakazu IKEDA
  • Publication number: 20120307608
    Abstract: Obtain an expanded address without altering the bit number of an address which is embedded in a wobble. Generate a virtual bit which is not recorded on a disc, and which is expressed by the disparity from the rules and the presence or absence of information embedded in part or all of the wobble address.
    Type: Application
    Filed: November 10, 2010
    Publication date: December 6, 2012
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Publication number: 20120300609
    Abstract: Obtain an expanded address without altering the bit number of an address which is embedded in a wobble. Generate a virtual bit which is not recorded on a disc, and which is expressed by the disparity from the rules and the presence or absence of information embedded in part or all of the wobble address.
    Type: Application
    Filed: November 10, 2010
    Publication date: November 29, 2012
    Inventors: Masakazu Ikeda, Koichiro Nishimura, Yutaka Nagai
  • Patent number: 8295134
    Abstract: As a synchronization signal pattern to be added, a pattern is generated (second SYNC pattern), which has a pattern that breaks a maximum run inserted in a pattern excluding a minimum run is used so that intersymbol interference does not occur readily on a high-density disc, and addition processing of a conventional synchronization signal pattern (first SYNC pattern) is switched according to identification information indicating whether or not a high-density disc for generation.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: October 23, 2012
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventor: Masakazu Ikeda
  • Patent number: 8289820
    Abstract: Recording capacity per layer is detected from a disc and bit allocation of wobble addresses in a conventional optical disc and bit allocation in a high-density optical disc are controlled selectively to detect physical position addresses on the disc. Address detection can be performed for two kinds of discs which are equal in structure of addresses embedded in wobbles but different in bit allocation of addresses.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 16, 2012
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Masakazu Ikeda, Akio Fukushima, Koichi Hirose
  • Publication number: 20120230173
    Abstract: An optical disk reproducing apparatus is provided which is capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of a first constrained length (for example, 4) and a PRML circuit of a second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 13, 2012
    Inventors: Yusuke NAKAMURA, Masakazu IKEDA
  • Publication number: 20120224466
    Abstract: A semiconductor device mounted in an optical disk apparatus controls writing and reading of data in and from an optical disk. The device performs first processing for adjusting a write strategy in such a manner that based on error information corresponding to a shift in the phase of a reproduction signal with respect to a channel clock signal for data reproduction, which is generated based on the reproduction signal read from the optical disk, the value of the error information related to a plurality of recording marks to be evaluated becomes minimum as a whole. The device also performs second processing for adjusting a write strategy in such a manner that the value of the error information related to a desired recording mark becomes small.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 6, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Atsushi Neo, Yasuo Mutsuro, Masakazu Ikeda, Junichi Tanjima
  • Patent number: 8258706
    Abstract: An LED drive circuit is an LED dive circuit that receives an alternating voltage to drive an LED, and includes a current remove portion that removes a current from a current supply line that supplies an LED drive current to the LED. If an input current to the LED drive circuit is an unnecessary current, the LED does not light because of current removal by the current remove portion. If the input current to the LED drive circuit turns into the LED drive current from the unnecessary current, the current remove portion decreases the amount of current removed.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: September 4, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Maruyama, Hiroyuki Shoji, Mitsuru Mariyama, Masakazu Ikeda, Hirohisa Warita, Katsumi Inaba, Naoki Fukunaga
  • Publication number: 20120201111
    Abstract: An optical disk reproducing device for controlling false detection of synchronization signals due to intersymbol interference, and stably improving accuracy of frequency acquisition of a phase locked loop (PLL) even when offset and so on occur. A signal width close to an original mark length is obtained to use for frequency acquisition of the PLL by, for example, using two different slice thresholds and taking a width between a rising of a result of slicing at one threshold and a falling of a result of slicing at the other threshold as a synchronization signal width. When asymmetric properties due to offset, asymmetry, etc. occur, an amount of corrections on the slice threshold is calculated, and it is reflected on a threshold previously set to always obtain a correct synchronization signal width.
    Type: Application
    Filed: April 16, 2012
    Publication date: August 9, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yusuke Nakamura, Masakazu Ikeda, Koichiro Nishimura
  • Publication number: 20120166704
    Abstract: Recording capacity per layer is detected from a disc and bit allocation of wobble addresses in a conventional optical disc and bit allocation in a high-density optical disc are controlled selectively to detect physical position addresses on the disc. Address detection can be performed for two kinds of discs which are equal in structure of addresses embedded in wobbles but different in bit allocation of addresses.
    Type: Application
    Filed: March 7, 2012
    Publication date: June 28, 2012
    Applicant: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Masakazu IKEDA, Akio Fukushima, Koichi Hirose
  • Patent number: 8189445
    Abstract: The present invention relates to an optical disk reproducing apparatus, and provides a technology capable of supporting even a situation in which a reproduction signal characteristic is changed due to a factor other than recording density of an optical disk by using PRML of different constrained length and capable of improving reading accuracy. The optical disk reproducing apparatus includes a PRML circuit of first constrained length (for example, 4) and a PRML circuit of second constrained length (for example, 5). Equalization error values obtained during calculation of equalization learning in respective circuits are compared with each other in a determination circuit. Switching control of a switch is performed so that an output of one of the PRML circuits having a smaller equalization error value is selected.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: May 29, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yusuke Nakamura, Masakazu Ikeda
  • Patent number: 8159906
    Abstract: Recording capacity per layer is detected from a disc and bit allocation of wobble addresses in a conventional optical disc and bit allocation in a high-density optical disc are controlled selectively to detect physical position addresses on the disc. Address detection can be performed for two kinds of discs which are equal in structure of addresses embedded in wobbles but different in bit allocation of addresses.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: April 17, 2012
    Assignee: Hitachi Consumer Electronics Co., Ltd.
    Inventors: Masakazu Ikeda, Akio Fukushima, Koichi Hirose