Abstract: With respect to a space including an object 40 of a display target, images of the space viewed from reference points 42a to 42c of view are created as reference images 46a, 46b, and 46c in advance and they are synthesized according to a position of an actual point of view to render a display image. In the certain reference image 46b, data other than a part 48 represented only in it is deleted. At the time of rendering of the deleted part, the other reference images 46a and 46c are used.

Abstract: For a space including an object to be displayed, images of the space viewed from reference points of view are created in advance as reference images, and the reference images are combined according to a position of an actual point of view to draw a display image. In this case, a reference image not displaying reflection is used to determine the color of the object (S50). In a case of expressing reflection of another object (Y in S52), a position of the reflected object is estimated in a three-dimensional space (S54), a position on the reference image corresponding to the position is acquired (S56), and a color of the position is combined with the color of the object (S60).

Abstract: To achieve a balance between responsiveness of image display with respect to movement of a viewing point, and image quality. Reference viewing points are set in respect of a space containing an object to be displayed, and images of the space as viewed from these respective reference viewing points are created as reference images. Meanwhile, when pixel values of display images from a virtual camera are determined, reference images are selected wherein a point on the object represented by the pixel in question is represented as an image, and the values of these pixels are combined using a rule based on the positional relationship etc. of the reference viewing points with the virtual camera.

Abstract: With respect to a space including an object 40 of a display target, images of the space viewed from reference points 42a to 42c of view are created as reference images 46a, 46b, and 46c in advance and they are synthesized according to a position of an actual point of view to render a display image. In the certain reference image 46b, data other than a part 48 represented only in it is deleted. At the time of rendering of the deleted part, the other reference images 46a and 46c are used.

Abstract: For a space including an object to be displayed, images of the space viewed from reference points of view are created in advance as reference images, and the reference images are combined according to a position of an actual point of view to draw a display image. In this case, a reference image not displaying reflection is used to determine the color of the object (S50). In a case of expressing reflection of another object (Y in S52), a position of the reflected object is estimated in a three-dimensional space (S54), a position on the reference image corresponding to the position is acquired (S56), and a color of the position is combined with the color of the object (S60).

Abstract: To achieve a balance between responsiveness of image display with respect to movement of a viewing point, and image quality. Reference viewing points are set in respect of a space containing an object to be displayed, and images of the space as viewed from these respective reference viewing points are created as reference images. Meanwhile, when pixel values of display images from a virtual camera are determined, reference images are selected wherein a point on the object represented by the pixel in question is represented as an image, and the values of these pixels are combined using a rule based on the positional relationship etc. of the reference viewing points with the virtual camera.

Abstract: A method of calculating the suitability of an object from a videogame for 3D printing includes: obtaining data representative of the object as found at a point in time within the video game, calculating a plurality of different scores indicative of the fitness of the object as represented by the obtained data for generating a 3D print of the object, where the plurality of different scores are respectively responsive to one or of the arrangement of the object as found at the point in time within the video game; the dependency of one or more elements of the object upon another element; a property of any connective structure used to connect elements of the 3D printed object together; the quality of the obtained data; and the method used to generate print data used for the 3D printed version of the object, calculating a combined score from the plurality of different scores for the object as found at a point in time within the video game, and associating the combined score with the data representative of the objec

Abstract: Aspects of the technology include method of selecting an object from a videogame for 3D printing. The method involves periodically rendering a virtual environment of a videogame for display at a succession of points in time. Information is periodically recorded that enables visual reconstruction of at least part of the virtual environment at a succession of points in time. A predetermined set of values is periodically recorded responsive to the state of the rendered virtual environment at a succession of points in time. The predetermined set of values enables a model of a selected part of the rendered virtual environment to be generated that is configured for 3D printing.

Abstract: Aspects of the technology include method of selecting an object from a videogame for 3D printing. The method involves periodically rendering a virtual environment of a videogame for display at a succession of points in time. Information is periodically recorded that enables visual reconstruction of at least part of the virtual environment at a succession of points in time. A predetermined set of values is periodically recorded responsive to the state of the rendered virtual environment at a succession of points in time. The predetermined set of values enables a model of a selected part of the rendered virtual environment to be generated that is configured for 3D printing.

Abstract: A method of 3D printing is provided. While running a videogame, the method includes generating a virtual game environment comprising in-game geometry. The method also includes receiving an indication that the current state of the virtual game environment has been selected for 3D printing; obtaining supplementary geometry and supplementing the in-game geometry with the supplementary geometry to create a 3D printer geometry. Components of the virtual game environment included in the 3D printer geometry are modified by the supplementary geometry to have structural features within the 3D printer geometry that have dimensions calculated to support the model in its final printed physical form.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing tasks is also provided. The processing system includes processing devices and an absolute timer. The absolute timer defines a time budget. The time budget provides a time period for the completion of tasks by selected processing devices independent of clock frequencies employed by the processing devices for processing the tasks.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing computer tasks is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors manages process scheduling of computing tasks by providing tasks to at least one of the first and second processors.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing computer tasks is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors manages process scheduling of computing tasks by providing tasks to at least one of the first and second processors.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A processing system for processing computer tasks is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors manages process scheduling of computing tasks by providing tasks to at least one of the first and second processors.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A processing system for performing graphics processing is also provided. A first processor is of a first processor type and a number of second processors are of a second processor type. One of the second processors can perform graphics processing on a first set of graphics data to generate a second set of graphics data, and another of the second processors can perform graphics processing on the second set to generate a third set of graphics data.

Abstract: Methods and apparatus provide for placing an apparatus into at least one of a plurality of operational modes, wherein: the apparatus includes a local memory, a bus operable to carry information to and from the local memory, one or more arithmetic processing units operable to process data and operatively coupled to the local memory, and a security circuit operable to place the apparatus into the operational modes; and the plurality of operational modes includes: (i) a first mode whereby the apparatus and an external device are operable to initiate a transfer of information into or out of the memory over the bus, (ii) a second mode whereby neither the apparatus nor the external device are operable to initiate a transfer of information into or out of the memory over the bus, and (iii) a third mode whereby the apparatus is operable to initiate a transfer of information into or out of the local memory over the bus, but the external device is not operable to initiate a transfer of information into or out of the loc

Abstract: Methods and apparatus provide for translating a software program page by page from a first instruction set architecture (ISA) into a second ISA using one or more of a set of processors of a multi-processor system; and executing the translated software program using a dedicated other processor of the multi-processor system.

Abstract: Methods and apparatus provide for: receiving a memory access request for data from a processor of a multi-processor system; determining whether the data of the memory access request is stored in a remote processing system coupled to the multi-processor system over a communications network; requesting the data from the remote processing system; receiving the data from the remote processing system over the communications network; and providing the data to the processor of the multi-processor system.

Abstract: Methods and apparatus provide for assigning an identifier to a DMA command, the identifier for association with an entry of a DMA table containing status information regarding the DMA command; receiving an indication that a DMA data transfer defined by the DMA command has been completed; and updating the status information of the entry of the DMA table associated with the DMA data transfer to indicate that the DMA data transfer has been completed.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network.