Abstract: A mask for exposure includes a light transmitting substrate, a plurality of substantially oblong, island-like light transmitting sections arranged periodically on the substrate, an opaque section formed on the substrate except where the light transmitting sections are arranged, and a plurality of phase shifter layers selectively formed in the light transmitting sections. The light transmitting sections include paired light transmitting sections opposed to each other at one end portion, and one of the phase shifter layers is formed in one of the paired light transmitting sections. An interval between the paired light transmitting sections at one end portion is smaller than an interval between adjacent ones of the light transmitting sections at portions other than the one end portion.

Abstract: A plurality of bit line contacts provided on one bit line BL are arranged on every other one of spaces each provided between every adjacent two of word lines WL and a plurality of bit line contacts provided on an adjacent bit line BL are arranged on every other one of spaces each provided between every adjacent two of word lines WL which is different from the space in which a corresponding one of the bit line contacts formed on the former bit line is arranged.

Abstract: A MOS random access memory device includes a semiconductor substrate having a trench formed therein, and an array of memory cells on the substrate. Each of the memory cells includes a 1-bit data-storage capacitor and a transfer-gate MOS transistor. The capacitor includes an insulated layer buried in the trench, which serves as a storage node. An island-shaped semiconductor layer covers the storage-node layer at least partially on the substrate, and is coupled thereto. The transistor has a source and a drain defining a channel region therebetween in the substrate, and an insulated gate overlying the channel region. One of the source and drain is directly coupled to the island-shaped layer, while the other of them is contacted with a corresponding data-transfer line (bit line) associated therewith.

Abstract: A structure of a semiconductor device and a method of manufacturing the same is provided wherein a leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET, and a holding characteristic of a memory cell such as a DRAM using these transistors as switching transistors can be improved, and further a reliability of a gate oxide film in a transfer gate can be improved. More particularly, a narrow band gap semiconductor region such as Si.sub.x Ge.sub.1-x, Si.sub.x Sn.sub.1-x, PbS is formed in an interior of a source region or a drain region in the SOI.IG-device. By selecting location and/or mole fraction of the narrow band gap semiconductor region in a SOI film, or selecting a kind of impurity element to compensate the crystal lattice mismatching due to the narrow-bandgap semiconductor region, the generation of crystal defects can be suppressed.

Abstract: A semiconductor memory device comprises a semiconductor substrate, a plurality of memory cells including a plurality of MOS transistors, each having a source, a drain and a gate, and a plurality of capacitors formed on the semiconductor substrate in a matrix manner, an interlayer insulating film formed on the memory cells and having a plurality of openings selectively formed, a plurality of plug electrodes formed in the openings of the interlayer insulating film, a plurality of bit lines, each bit line being connected to one of the source and the drain of each of the MOS transistors through a corresponding one of the plug electrodes, and a plurality word lines, each word line being the gate of each of the MOS transistors.

Abstract: A plurality of bit line contacts provided on one bit line BL are arranged on every other one of spaces each provided between every adjacent two of word lines WL and a plurality of bit line contacts provided on an adjacent bit line BL are arranged on every other one of spaces each provided between every adjacent two of word lines WL which is different from the space in which a corresponding one of the bit line contacts formed on the former bit line is arranged.

Abstract: A MOS random access memory device includes a semiconductor substrate having a trench formed therein, and an array of memory cells on the substrate. Each of the memory cells includes a 1-bit data-storage capacitor and a transfer-gate MOS transistor. The capacitor includes an insulated layer buried in the trench, which serves as a storage node. An island-shaped semiconductor layer covers the storage-node layer at least partially on the substrate, and is coupled thereto. The transistor has a source and a drain defining a channel region therebetween in the substrate, and an insulated gate overlying the channel region. One of the source and drain is directly coupled to the island-shaped layer, while the other of them is contacted with a corresponding data-transfer line (bit line) associated therewith.

Abstract: A manufacturing method of semiconductor devices and semiconductor devices isolated by a trench portion. The trench portion is refilled with a Si epitaxial growth layer. The trench has a first insulating layer on its side wall and a second insulating layer formed by the oxidation in the self-alignment manner, as a cap layer, on the top portion of the trench. A semiconductor device formed on the substrate is isolated by the trench. The excessive leakage currents created by the stress between the substrate and the Si epitaxial layer are decreased. The concentration of the field effect at the corner portion of the trench is suppressed by the cap layer. The refilling step can be also made to a trench having the wider opening and another trench having the narrower opening simultaneously and uniformly.

Abstract: A method of measuring at least one of a catecholamine and its metabolite including a biological sample pretreatment process, a fluorescence inducing process of converting into a fluorescence inductor the at least one of a catecholamine and its metabolite in the biological sample subjected to pretreatment by means of a fluorescence inducing reagent, and a measuring process of separating and measuring said fluorescence inductor by liquid chromatography, said method being characterized by addition of a specified volume of maleimide before said process of making the biological sample fluorescent.

Abstract: An electroconductive article is disclosed, which comprises a polar group-containing high polymeric substrate, and an electroconductive layer of cupric sulfide formed therein and is produced by immersing the polar group-containing high polymeric substrate in an aqueous solution containing a bivalent copper compound and a reducing agent or an aqueous solution containing a monovalent copper compound, and at the same time or subsequently treating it in a solution of a sulfur releasable substance.

Abstract: A printer control system including a printer and a control unit for controlling the printer is disclosed. The printer function designating information which is used to designate the functions, which vary in accordance with the kind of a job to be done, of the printer is stored in a memory in the control unit. When a printing operation of the printer is started, the function designating information is outputted from the memory, transmitted from the control unit to the printer and stored temporarily in a memory provided in the printer. Various kinds of operations are carried out in accordance with a control code transmitted from the control unit to the printer, and an operation for a designated job is carried out with reference to the function designating information.