Patents by Inventor Masanobu Saito

Masanobu Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7612401
    Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: November 3, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
  • Patent number: 7541233
    Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: June 2, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
  • Patent number: 7426482
    Abstract: In an image processing apparatus that includes an order placement means for executing an operation associated with order placement of an expendable used in an image forming apparatus, data associated with image formation is accumulated to have a timing associated with order placement as a trigger, and the operation of the order placement means is controlled on the basis of the accumulated value. In this manner, redundant orders for expendables can be prevented.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: September 16, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Satoru Inami, Masanobu Saito, Seiichi Shinohara, Takayuki Namiki
  • Publication number: 20080145075
    Abstract: Embodiments of the present invention include an image bearing member arranged to bear an electrostatic latent image, a charging member contacting the image bearing member to charge a surface of the image bearing member with application of a DC voltage to the charging member, a current detection unit arranged to detect a DC current flowing in the charging member, and a control unit configured to control the voltage applied to the charging member, wherein a plurality of different DC voltages are successively applied to the charging member during a period of no image formation until a change amount of change in the DC current with respect to change in the DC voltage becomes not larger than a predetermined value, and the control unit controls a DC voltage applied to the charging member during a period of image formation based on a result detected by the current detection unit.
    Type: Application
    Filed: December 11, 2007
    Publication date: June 19, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Atsushi Toda, Masanobu Saito
  • Publication number: 20080119021
    Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
    Type: Application
    Filed: January 15, 2008
    Publication date: May 22, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
  • Publication number: 20080048250
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Application
    Filed: August 28, 2007
    Publication date: February 28, 2008
    Inventors: Hisayo MOMOSE, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 7282752
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: October 16, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 7261322
    Abstract: A leaf spring bracket is fixed to an outer surface of a vertical wall of a side member in a vehicle transverse direction by use of rivets penetrating the vertical wall. A gusset which couples an end of a cross member in the vehicle transverse direction with the side member has a vertical plate and upper and lower horizontal plates. The vertical plate is fixed to the vertical wall of the side member. The upper and lower horizontal plates extend inward in the vehicle transverse direction from upper and lower ends of the vertical plate, respectively, and are fixed to upper and lower walls of the cross member, respectively. The vertical plate has ribs protruding inward in the vehicle transverse direction. The ribs form and define recessed parts in an outer surface of the vertical plate in the vehicle transverse direction. Parts of the rivets, which project from an inner surface of the vertical wall in the vehicle transverse direction, are housed in the recessed parts.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: August 28, 2007
    Assignee: Isuzu Motors Limited
    Inventors: Jun Ito, Fumitaka Matsumoto, Masanobu Saito, Hiroshi Sato
  • Patent number: 7120376
    Abstract: An image forming apparatus for forming an image on a recording material, includes a rotatable image bearing member; a developing member for developing a latent image formed on the image bearing member; a cleaning blade for removing a developer from the image bearing member, the cleaning blade being cooperative with the image bearing member to form a nip in which the cleaning blade is contacted to the image bearing member within a predetermined area; and a controller for executing a first step of stopping rotation of the image bearing member after completion of an image forming operation for forming an image on the recording material; a second step of rotating, after the first step, the image bearing member through a predetermined peripheral distance in a rotational direction which is the same as a direction in which the image bearing member is rotated during the image forming operation; a third step of rotating, after the second step, the image bearing member in a rotational direction which is opposite the di
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: October 10, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Kazuhiro Okubo, Minoru Matsuguma, Jun Haruna, Kazuhisa Maruyama, Yoshihiro Ito
  • Patent number: 7081386
    Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 25, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
  • Publication number: 20060131641
    Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.
    Type: Application
    Filed: January 25, 2006
    Publication date: June 22, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
  • Patent number: 7050733
    Abstract: An image forming apparatus includes a plurality of developing devices each including a developer carrying member for carrying a developer to develop an electrostatic latent image formed on an image bearing member, and a developer regulating member for regulating the developer carried on the developer carrying member; a common voltage applying device for applying a common voltage to the plurality of the developer regulating member. When a first one of the developer carrying members is rotating, and when a second one of the developer carrying members is not rotating, a potential difference between a potential of the second developer carrying member and the common voltage is smaller than a potential difference between a potential of the first developer carrying member and the common voltage.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: May 23, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Seiji Yamaguchi, Yasunari Watanabe, Kazunori Hashimoto
  • Patent number: 7006774
    Abstract: An image forming apparatus includes a plurality of developing devices, each of which includes a developer carrying member for carrying a developer to develop an electrostatic image formed on an image bearing member with a developer, and a developer regulating member for regulating the developer carried on the developer carrying member; a common voltage applying device for applying voltages to the developer regulating members, wherein the voltages are applied to the developer carrying members are variable independently from each other, and when at least one of the voltages varies, the voltage applied by the voltage applying device is capable of being changed.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: February 28, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Seiji Yamaguchi, Yasunari Watanabe, Kazunori Hashimoto
  • Publication number: 20050224898
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Application
    Filed: June 3, 2005
    Publication date: October 13, 2005
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 6954596
    Abstract: An image forming apparatus in which information regarding used amounts in image forming apparatus main bodies of different features is stored in the storage part of a cartridge, and the interchange time of the cartridge is judged by the use of the information. Thereby, even if a cartridge having interchangeability between a plurality of kinds of image forming apparatus main bodies of different features is mounted on each of the main bodies of different features, an interchange time corresponding to the main body can be grasped accurately.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: October 11, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Marehiko Hirajima
  • Patent number: 6929990
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: August 16, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 6931218
    Abstract: An image forming apparatus (typically a color printer) and control method use a detachable yellow toner process cartridge Y for forming a yellow toner image on a recording medium and a detachable magenta process cartridge M for forming a magenta toner image on the recording medium after the yellow image has been formed. By detecting the amount of toner user by the yellow process cartridge Y and estimating the amount of yellow toner that has gotten into the magenta process cartridge M, the apparatus and method can determine when the useful life span of the magenta process cartridge M is at an end. By displaying a message to a user that it is time to replace the magenta process cartridge M before print picture quality deteriorates, the apparatus and method make it possible to avoid outputting poor quality printed images.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: August 16, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomomi Kakeshita, Masanobu Saito
  • Publication number: 20050116459
    Abstract: A leaf spring bracket is fixed to an outer surface of a vertical wall of a side member in a vehicle transverse direction by use of rivets penetrating the vertical wall. A gusset which couples an end of a cross member in the vehicle transverse direction with the side member has a vertical plate and upper and lower horizontal plates. The vertical plate is fixed to the vertical wall of the side member. The upper and lower horizontal plates extend inward in the vehicle transverse direction from upper and lower ends of the vertical plate, respectively, and are fixed to upper and lower walls of the cross member, respectively. The vertical plate has ribs protruding inward in the vehicle transverse direction. The ribs form and define recessed parts in an outer surface of the vertical plate in the vehicle transverse direction. Parts of the rivets, which project from an inner surface of the vertical wall in the vehicle transverse direction, are housed in the recessed parts.
    Type: Application
    Filed: March 4, 2003
    Publication date: June 2, 2005
    Inventors: Jun Ito, Fumitaka Matsumoto, Masanobu Saito, Hiroshi Sato
  • Patent number: 6873350
    Abstract: There is provided an image forming apparatus such as a latent image forming apparatus, in which the density of a half tone is stable independent on a write position of a main scanning line, even if a plurality of semiconductor lasers are used. The image forming apparatus has a latent image forming unit for pulse-width-modulating a drive signal of the semiconductor laser in response to the write position of image data. The latent image forming unit has an image sorting circuit for sorting the image data into an odd line and an even line, a memory for storing a turning on position, a pulse generating position control circuit for generating a pulse generating position signal, a PWM circuit for generating a triangular wave in accordance with the pulse generating position signal, and a beam-A-circuit and a beam-B-circuit, which control beams from the semiconductor laser.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: March 29, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Satoru Inami, Seiichi Shinohara, Takayuki Namiki
  • Publication number: 20050063734
    Abstract: An image forming apparatus for forming an image on a recording material, includes a rotatable image bearing member; a developing member for developing a latent image formed on the image bearing member; a cleaning blade for removing a developer from the image bearing member, the cleaning blade being cooperative with the image bearing member to form a nip in which the cleaning blade is contacted to the image bearing member within a predetermined area; and a controller for executing a first step of stopping rotation of the image bearing member after completion of an image forming operation for forming an image on the recording material; a second step of rotating, after the first step, the image bearing member through a predetermined peripheral distance in a rotational direction which is the same as a direction in which the image bearing member is rotated during the image forming operation; a third step of rotating, after the second step, the image bearing member in a rotational direction which is opposite the di
    Type: Application
    Filed: August 17, 2004
    Publication date: March 24, 2005
    Applicant: Canon Kabushiki Kaisha
    Inventors: Masanobu Saito, Kazuhiro Okubo, Minoru Matsuguma, Jun Haruna, Kazuhisa Maruyama, Yoshihiro Ito