Patents by Inventor Masanobu Saito
Masanobu Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20040256660Abstract: A semiconductor device comprises a semiconductor substrate, and a non-volatile memory cell provided on the semiconductor substrate, the non-volatile memory cell comprising a tunnel insulating film having a film thickness periodically and continuously changing in a channel width direction of the non-volatile memory cell, a floating gate electrode provided on the tunnel insulating film, a control gate electrode provided above the floating gate electrode, and an interelectrode insulating film provided between the control gate electrode and the floating gate electrode.Type: ApplicationFiled: March 31, 2004Publication date: December 23, 2004Inventors: Yoshio Ozawa, Shigehiko Saida, Yuji Takeuchi, Masanobu Saito
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Publication number: 20040208657Abstract: An image forming apparatus (typically a color printer) and control method involve a detachable yellow toner process cartridge Y for forming a yellow toner image on a recording medium and a detachable magenta process cartridge M for forming a magenta toner image on the recording medium after the yellow image has been formed. By detecting the amount of toner user by the yellow process cartridge Y and estimating the amount of yellow toner that has gotten into the magenta process cartridge M, the apparatus and method can determine when the useful life span of the magenta process cartridge M is at an end. By displaying a message to a user that it is time to replace the magenta process cartridge M before print picture quality deteriorates, the apparatus and method make it possible to avoid outputting poor quality printed images.Type: ApplicationFiled: July 25, 2003Publication date: October 21, 2004Applicant: Canon Kabushiki KaishaInventors: Tomomi Kakeshita, Masanobu Saito
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Publication number: 20040146312Abstract: An image forming apparatus includes a plurality of developing devices, each of which includes a developer carrying member for carrying a developer to develop an electrostatic image formed on an image bearing member with a developer, and a developer regulating member for regulating the developer carried on the developer carrying member; common voltage applying means for applying voltages to the developer regulating members, wherein the voltages applied to the developer carrying members are variable independently from each other, and when at least one of the voltages varies, the voltage applied by said voltage applying means is capable of being changed.Type: ApplicationFiled: November 18, 2003Publication date: July 29, 2004Applicant: Canon Kabushiki KaishaInventors: Masanobu Saito, Seiji Yamaguchi, Yasunari Watanabe, Kazunori Hashimoto
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Publication number: 20040136742Abstract: An image forming apparatus includes a plurality of developing devices each including a developer carrying member for carrying a developer to develop an electrostatic latent image formed on an image bearing member, and a developer regulating member for regulating the developer carried on the developer carrying member; common voltage applying means for applying a common voltage to the plurality of develop our regulating members, wherein a first one of the developer carrying members is rotating, and a second one of the developer carrying members is not rotating, a potential difference between the second developer carrying member and the common voltage is smaller than a voltage difference between the first developer carrying member and the common voltage.Type: ApplicationFiled: November 19, 2003Publication date: July 15, 2004Applicant: Canon Kabushiki KaishaInventors: Masanobu Saito, Seiji Yamaguchi, Yasunari Watanabe, Kazunori Hashimoto
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Publication number: 20040131580Abstract: The invention provides cosmetics obtained from naturally occurring algae as the starting material and exhibiting protective and cosmetic effects on the skin and hair. Algal proteins or their hydrolysates peptides, or derivatives thereof such as esters are contained in usual skin cosmetics, hair cosmetics, bath agents etc. The algae are preferably algae of the genus Porphyra, wakame seaweed, Chlorella or Spirulina, and preferably the proteins are extracted with a solvent directly after destroying cell walls of the algae by milling etc. The algal peptides can be obtained by treatment of the algae themselves or by enzyme decomposition, acid or alkali hydrolysis of the proteins or heating extraction under pressure.Type: ApplicationFiled: December 19, 2003Publication date: July 8, 2004Applicant: SHIRAKO CO., LTD.Inventors: Hiroshi Hagino, Masanobu Saito
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Publication number: 20040131636Abstract: This invention provides a novel health food which is effective in prevention and treatment of life-style related diseases in organs in the circulatory system, such as hypertension, cerebral infarction, myocardial infarction etc. by improving blood fluidity. Phospholipid components or mineral components are collected from seaweeds of the genus Porphyra and/or seaweeds of the genus Undaria and then formed into a health food improving blood fluidity. This health food has an improving action on blood fluidity, and is thus effective in prevention and treatment of life-style related diseases in organs in the circulatory system, such as hypertension, cerebral infarction, myocardial infarction etc.Type: ApplicationFiled: December 19, 2003Publication date: July 8, 2004Applicant: SHIRAKO CO., LTD.Inventors: Hiroshi Hagino, Masanobu Saito
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Publication number: 20040091274Abstract: An image forming apparatus in which information regarding used amounts in image forming apparatus main bodies of different features is stored in the storage part of a cartridge, and the interchange time of the cartridge is judged by the use of the information. Thereby, even if a cartridge having interchangeability between a plurality of kinds of image forming apparatus main bodies of different features is mounted on each of the main bodies of different features, an interchange time corresponding to the main body can be grasped accurately.Type: ApplicationFiled: August 28, 2003Publication date: May 13, 2004Applicant: CANON KABUSHIKI KAISHAInventors: Masanobu Saito, Marehiko Hirajima
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Publication number: 20040070024Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 &mgr;m: and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.Type: ApplicationFiled: October 9, 2003Publication date: April 15, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
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Publication number: 20040047895Abstract: This invention provides a composition capable of efficiently exhibiting various kinds of physiological activities possessed potentially by seaweeds of the genus Porphyra. The laver protein-containing composition is obtained by adding water, a saline solution or an aqueous dilute alkali solution to seaweeds of the genus Porphyra or finely divided dry particles thereof, wet milling the materials to extract soluble components therefrom, and separating proteins form the extract. A composition containing different kinds of laver proteins may be obtained by separately conducting extraction with water, a saline solution or an aqueous dilute alkali solution, or a composition containing a mixture of laver proteins may be obtained by conducting such extraction procedures successively.Type: ApplicationFiled: September 2, 2003Publication date: March 11, 2004Applicant: SHIRAKO CO., LTD.Inventors: Hiroshi Hagino, Masanobu Saito
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Patent number: 6642560Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrata via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (Tox) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or lass than 0.3 &mgr;m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.3 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.Type: GrantFiled: June 4, 2002Date of Patent: November 4, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
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Publication number: 20030040984Abstract: In an image processing apparatus that includes an order placement means for executing an operation associated with order placement of an expendable used in an image forming apparatus, data associated with image formation is accumulated to have a timing associated with order placement as a trigger, and the operation of the order placement means is controlled on the basis of the accumulated value. In this manner, redundant orders for expendables can be prevented.Type: ApplicationFiled: August 22, 2002Publication date: February 27, 2003Applicant: Canon Kabushiki KaishaInventors: Satoru Inami, Masanobu Saito, Seiichi Shinohara, Takayuki Namiki
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Publication number: 20020145157Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrata via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (Tox) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or lass than 0.3 &mgr;m and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.3 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.Type: ApplicationFiled: June 4, 2002Publication date: October 10, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
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Patent number: 6448989Abstract: The present invention relates to an image forming apparatus in which an electrostatic latent image is formed on an electrophotographic photosensitive member with digital light, and electrostatically developed with a developer to form a developed image. The apparatus has an exposure device for normally increasing the reflection density only in a specified region on the photosensitive member in a white image portion where no image is basically formed, in the horizontal scanning direction of the digital light. For example, a small amount of developer is supplied to either end of the photosensitive member having the tendency that the amount of the developer supplied is small, thereby preventing the occurrence of image flow at either end.Type: GrantFiled: September 23, 1997Date of Patent: September 10, 2002Assignee: Canon Kabushiki KaishaInventors: Yasushi Shimizu, Masanobu Saito, Gaku Konishi, Hiroshi Sato
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Publication number: 20020119381Abstract: A photosensitive member which can prevent occurrence of a streak image due to wear of a surface of the photosensitive member while preventing occurrence of image-flow is provided, and an average particle diameter of a scraped particle obtained from a surface of the photosensitive member by the rubbing of a cleaning member is 9.0 &mgr;m or less.Type: ApplicationFiled: October 28, 1999Publication date: August 29, 2002Inventors: SATORU MOTOHASHI, KEIJI OKANO, MASANOBU SAITO, GAKU KONISHI, YASUSHI SHIMIZU, HIROSHI SATO, AKIRA DOMON
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Patent number: 6434054Abstract: A non-volatile semiconductor memory device according to the invention comprises a memory cell array having a plurality of non-volatile memory cells, and a write state machine controlling a voltage applied to a memory cell selected from the memory cell array and a voltage application period, in accordance with each of reading of data from the selected memory cell, writing of data into the selected memory cell, and erasion of data from the selected memory. The write state machine executes writing, under a first writing condition, on a predetermined number of memory cells included in the memory cell array, and executes writing on memory cells other than the predetermined number of memory cells, under a second writing condition set in accordance with a result of the writing executed under the first writing condition.Type: GrantFiled: January 9, 2002Date of Patent: August 13, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hitoshi Shiga, Toru Tanzawa, Masanobu Saito
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Publication number: 20020080654Abstract: A non-volatile semiconductor memory device according to the invention comprises a memory cell array having a plurality of non-volatile memory cells, and a write state machine controlling a voltage applied to a memory cell selected from the memory cell array and a voltage application period, in accordance with each of reading of data from the selected memory cell, writing of data into the selected memory cell, and erasion of data from the selected memory. The write state machine executes writing, under a first writing condition, on a predetermined number of memory cells included in the memory cell array, and executes writing on memory cells other than the predetermined number of memory cells, under a second writing condition set in accordance with a result of the writing executed under the first writing condition.Type: ApplicationFiled: January 9, 2002Publication date: June 27, 2002Applicant: Kabushiki Kaisha ToshibaInventors: Hitoshi Shiga, Toru Tanzawa, Masanobu Saito
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Patent number: 6410952Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 &mgr;m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.Type: GrantFiled: April 9, 2001Date of Patent: June 25, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
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Publication number: 20020036688Abstract: There is provided an image forming apparatus such as a latent image forming apparatus, in which the density of a half tone is stable independent on a write position of a main scanning line, even if a plurality of semiconductor lasers are used. The image forming apparatus has a latent image forming unit for pulse-width-modulating a drive signal of the semiconductor laser in response to the write position of image data. The latent image forming unit has an image sorting circuit for sorting the image data into an odd line and an even line, a memory for storing a turning on position, a pulse generating position control circuit for generating a pulse generating position signal, a PWM circuit for generating a triangular wave in accordance with the pulse generating position signal, and a beam-A-circuit and a beam-B-circuit, which control beams from the semiconductor laser.Type: ApplicationFiled: June 25, 2001Publication date: March 28, 2002Inventors: Masanobu Saito, Satoru Inami, Seiichi Shinohara, Takayuki Namiki
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Patent number: 6351417Abstract: A non-volatile semiconductor memory device according to the invention comprises a memory cell array having a plurality of non-volatile memory cells, and a write state machine controlling a voltage applied to a memory cell selected from the memory cell array and a voltage application period, in accordance with each of reading of data from the selected memory cell, writing of data into the selected memory cell, and erasing of data from the selected memory. The write state machine executes writing, under a first writing condition, on a predetermined number of memory cells included in the memory cell array, and executes writing on memory cells other than the predetermined number of memory cells, under a second writing condition set in accordance with a result of the writing executed under the first writing condition.Type: GrantFiled: April 13, 2001Date of Patent: February 26, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Hitoshi Shiga, Toru Tanzawa, Masanobu Saito
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Publication number: 20020000618Abstract: A semiconductor device and a method for fabricating the same according to the present invention are characterized by the shape of a gate electrode, the shape or the range of a diffusion layer forming ion implantation region, or the peripheral shape of an element region, or, characterized in that an insulating film for coating a part of an element region formed before ion implantation.Type: ApplicationFiled: April 30, 2001Publication date: January 3, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masanobu Saito, Akira Umezawa