Patents by Inventor Masanori Terahara

Masanori Terahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8847282
    Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: September 30, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
  • Patent number: 8835327
    Abstract: A method of manufacturing a semiconductor device disclosed herein includes: mounting a substrate on an electrostatic chuck placed inside a chamber, the electrostatic chuck having a first temperature and the substrate being retained in advance in an atmosphere having a second temperature lower than the first temperature; fixing the substrate onto the electrostatic chuck by applying a voltage to the electrostatic chuck; heating the electrostatic chuck to a third temperature higher than the first temperature and the second temperature after mounting the substrate; and processing the substrate after the heating.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: September 16, 2014
    Assignee: Fujitsu Limited
    Inventors: Masanori Terahara, Hikaru Kokura, Akihiro Hasegawa, Atsuo Fushida, Fumihiko Akaboshi
  • Publication number: 20140138769
    Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.
    Type: Application
    Filed: January 28, 2014
    Publication date: May 22, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
  • Patent number: 8709896
    Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: April 29, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
  • Publication number: 20140057421
    Abstract: A semiconductor device production method includes: forming a protection film on a semiconductor substrate; forming a first resist pattern on the protection film; implanting a first impurity ion into the semiconductor substrate using the first resist pattern as a mask; removing the first resist pattern; forming on the surface of the semiconductor substrate a chemical reaction layer that takes in surface atoms from the semiconductor substrate through chemical reaction, after the removing of the first resist pattern; removing the chemical reaction layer formed on the semiconductor substrate and removing the surface of the semiconductor substrate, after the forming of the chemical reaction layer; and growing a semiconductor layer epitaxially on the surface of the semiconductor substrate, after the removing of the surface of the semiconductor substrate.
    Type: Application
    Filed: August 13, 2013
    Publication date: February 27, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: JUNJI OH, MASANORI TERAHARA
  • Publication number: 20140051222
    Abstract: A method of manufacturing a semiconductor device includes forming a first insulating film above a semiconductor substrate, patterning the first insulating film to form a first and a second opening, forming a first sidewall film on side walls of the first and the second openings, etching the semiconductor substrate with the first insulating film and the first sidewall film as a mask to dig down the first opening and the second opening, removing the first sidewall film to form a first offset portion in the first opening and a second offset portion in the second opening, the first and the second offset portion including a part of a surface of the semiconductor substrate, and etching a bottom of the first opening with the first insulating film as a mask.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 20, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: MASANORI TERAHARA, Akira Katakami, Eiji Yoshida, AKIHIKO HARADA
  • Publication number: 20130244405
    Abstract: A method of manufacturing a semiconductor device disclosed herein includes: mounting a substrate on an electrostatic chuck placed inside a chamber, the electrostatic chuck having a first temperature and the substrate being retained in advance in an atmosphere having a second temperature lower than the first temperature; fixing the substrate onto the electrostatic chuck by applying a voltage to the electrostatic chuck; heating the electrostatic chuck to a third temperature higher than the first temperature and the second temperature after mounting the substrate; and processing the substrate after the heating.
    Type: Application
    Filed: January 22, 2013
    Publication date: September 19, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Masanori Terahara, Hikaru Kokura, Akihiro Hasegawa, Atsuo Fushida, Fumihiko Akaboshi
  • Publication number: 20120256264
    Abstract: A semiconductor device includes a semiconductor substrate including a well having a first conductivity type defined by a device isolation region, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film and including a first side surface and a second side surface facing the first side surface, and a first side wall insulating film formed on the first side surface and a second side wall insulating film formed on the second side surface.
    Type: Application
    Filed: April 5, 2012
    Publication date: October 11, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Masaki Haneda, Yuka Kase, Masanori Terahara, Takayuki Aoyama
  • Patent number: 8273630
    Abstract: A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm, forming a first oxide film at least on the second surface of the silicon substrate, forming a first film by covering at least the first surface, forming a mask pattern on the first surface by patterning the first film, forming a device separating region on the first surface by using the mask pattern as a mask, forming a gate insulating film on the first surface, forming a gate electrode on the first surface via the gate insulating film, forming a source and a drain one on each side of the gate electrode, and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: September 25, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takayuki Wada, Masanori Terahara, Junji Oh
  • Patent number: 8193048
    Abstract: A semiconductor device formed in a semiconductor substrate wherein the semiconductor substrate has a trench for isolating elements from each other, the trench has unevenness at the bottom thereof, and an insulator is buried in the trench.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: June 5, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masato Miyamoto, Masanori Terahara
  • Publication number: 20120009752
    Abstract: A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm, forming a first oxide film at least on the second surface of the silicon substrate, forming a first film by covering at least the first surface, forming a mask pattern on the first surface by patterning the first film, forming a device separating region on the first surface by using the mask pattern as a mask, forming a gate insulating film on the first surface, forming a gate electrode on the first surface via the gate insulating film, forming a source and a drain one on each side of the gate electrode, and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
    Type: Application
    Filed: September 21, 2011
    Publication date: January 12, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Takayuki Wada, Masanori Terahara, Junji Oh
  • Publication number: 20120001265
    Abstract: A method of manufacturing a semiconductor device includes the steps of forming a trench on a semiconductor substrate to define a first and a second element regions; burying a first oxide film in the trench; forming a second oxide film on surfaces of the first and second element regions; performing a first ion doping using a first mask which is exposing a first region containing the first element region and a part of the first oxide; performing a second ion doping using a second mask which is exposing a second region containing the second element region and a part of the first oxide film; and removing the second oxide film formed in the first element region and the second element region by etching, and the first oxide film is selectively thinned using the first or second mask after performing the first or second ion doping.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 5, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Masanori TERAHARA, Masaki Nakagawa
  • Patent number: 8043917
    Abstract: A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm, forming a first oxide film at least on the second surface of the silicon substrate, forming a first film by covering at least the first surface, forming a mask pattern on the first surface by patterning the first film, forming a device separating region on the first surface by using the mask pattern as a mask, forming a gate insulating film on the first surface, forming a gate electrode on the first surface via the gate insulating film, forming a source and a drain one on each side of the gate electrode, and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: October 25, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Takayuki Wada, Masanori Terahara, Junji Oh
  • Patent number: 8039358
    Abstract: A method of manufacturing a semiconductor device includes the steps of forming a trench on a semiconductor substrate to define a first and a second element regions; burying a first oxide film in the trench; forming a second oxide film on surfaces of the first and second element regions; performing a first ion doping using a first mask which is exposing a first region containing the first element region and a part of the first oxide; performing a second ion doping using a second mask which is exposing a second region containing the second element region and a part of the first oxide film; and removing the second oxide film formed in the first element region and the second element region by etching, and the first oxide film is selectively thinned using the first or second mask after performing the first or second ion doping.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: October 18, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masanori Terahara, Masaki Nakagawa
  • Patent number: 7951686
    Abstract: A trench is formed in a surface layer of a semiconductor substrate, the trench surrounding an active region. A lower insulating film made of insulating material is deposited over the semiconductor device, the lower insulating film filling a lower region of the trench and leaving an empty space in an upper region. An upper insulating film made of insulating material having therein a tensile stress is deposited on the lower insulating film, the upper insulating film filling the empty space left in the upper space. The upper insulating film and the lower insulating film deposited over the semiconductor substrate other than in the trench are removed.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: May 31, 2011
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Hirofumi Watatani, Masanori Terahara, Ryo Tanabe, Kaina Suzuki, Shigeo Satoh
  • Patent number: 7947567
    Abstract: A semiconductor device fabrication method is disclosed. The method comprises an insulating film forming step of forming an insulating film on a semiconductor substrate; a trench forming step of forming a trench for device isolation in a predetermined part of the semiconductor substrate; a trench filling step of forming a buried oxide film filling the trench; a polishing step of polishing the buried oxide film on the semiconductor substrate until the insulating film is exposed; a thickness measuring step of measuring the thickness of the insulating film remaining after the polishing; an etching amount determining step of determining an etching amount of etching the polished buried oxide film based on the measured thickness of the remaining insulating film; and a buried oxide film etching step of etching the polished buried oxide film based on the determined etching amount.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: May 24, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Junji Oh, Masanori Terahara
  • Patent number: 7846792
    Abstract: A method for manufacturing a semiconductor device that controls the influence of a thickness of a stopper film even if there is a change in the thickness of the stopper film by measuring the thickness prior to etching to a predetermined thickness.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 7, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Masanori Terahara
  • Publication number: 20100144117
    Abstract: A trench is formed in a surface layer of a semiconductor substrate, the trench surrounding an active region. A lower insulating film made of insulating material is deposited over the semiconductor device, the lower insulating film filling a lower region of the trench and leaving an empty space in an upper region. An upper insulating film made of insulating material having therein a tensile stress is deposited on the lower insulating film, the upper insulating film filling the empty space left in the upper space. The upper insulating film and the lower insulating film deposited over the semiconductor substrate other than in the trench are removed.
    Type: Application
    Filed: February 18, 2010
    Publication date: June 10, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Sadahiro Kishii, Hirofumi Watatani, Masanori Terahara, Ryo Tanabe, Kaina Suzuki, Shigeo Satoh
  • Patent number: 7701016
    Abstract: A trench is formed in the surface layer of a semiconductor substrate, surrounding an active region. A lower insulating film made of insulating material fills a lower region of the trench. An upper insulating film fills a region of the trench above the lower insulating film. The upper insulating film has therein a stress generating tensile strain in a surface layer of the active region.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: April 20, 2010
    Assignee: Fujitsu Limited
    Inventors: Sadahiro Kishii, Hirofumi Watatani, Masanori Terahara, Ryo Tanabe, Kaina Suzuki, Shigeo Satoh
  • Publication number: 20090317956
    Abstract: A method for manufacturing a semiconductor device includes forming a silicon substrate having first and second surfaces, the silicon substrate including no oxide film or an oxide film having a thickness no greater than 100 nm, forming a first oxide film at least on the second surface of the silicon substrate, forming a first film by covering at least the first surface, forming a mask pattern on the first surface by patterning the first film, forming a device separating region on the first surface by using the mask pattern as a mask, forming a gate insulating film on the first surface, forming a gate electrode on the first surface via the gate insulating film, forming a source and a drain one on each side of the gate electrode, and forming a wiring layer on the silicon substrate while maintaining the first oxide film on the second surface.
    Type: Application
    Filed: May 19, 2009
    Publication date: December 24, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Takayuki Wada, Masanori Terahara, Junji Oh