Patents by Inventor Matthew Henderson
Matthew Henderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160273286Abstract: An example method for determining fluid flow in an open channel fluid conduit may include coupling a sensor assembly to an exterior surface of the open channel fluid conduit. Measurements may be received from the sensor assembly. The method may further include calculating a flow rate of a fluid within the open channel fluid conduit based, at least in part, on the received measurement.Type: ApplicationFiled: August 22, 2013Publication date: September 22, 2016Inventors: Charles Cutler Britton, Matthew Henderson, Adrian Eastland Smith
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Patent number: 9379201Abstract: A method includes thinning a back-side of a substrate to expose a portion of a first via that is formed in the substrate. The method also includes forming a first diode at the back-side of the substrate. The first diode is coupled to the first via.Type: GrantFiled: July 22, 2015Date of Patent: June 28, 2016Assignee: Qualcomm IncorporatedInventors: Vidhya Ramachandran, Brian Matthew Henderson, Shiqun Gu, Chiew-Guan Tan, Jung Pill Kim, Taehyun Kim
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Publication number: 20150333053Abstract: A method includes thinning a back-side of a substrate to expose a portion of a first via that is formed in the substrate. The method also includes forming a first diode at the back-side of the substrate. The first diode is coupled to the first via.Type: ApplicationFiled: July 22, 2015Publication date: November 19, 2015Inventors: Vidhya Ramachandran, Brian Matthew Henderson, Shiqun Gu, Chiew-Guan Tan, Jung Pill Kim, Taehyun Kim
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Patent number: 9190201Abstract: An integrated magnetic film enhanced inductor and a method of forming an integrated magnetic film enhanced inductor are disclosed. The integrated magnetic film enhanced inductor includes an inductor metal having a first portion and a second portion, a top metal or bottom metal coupled to the inductor metal, and an isolation film disposed one of in, on, and adjacent to at least one of the first portion and the second portion of the inductor metal. The isolation film includes a magnetic material, such as a magnetic film.Type: GrantFiled: March 4, 2009Date of Patent: November 17, 2015Assignee: QUALCOMM IncorporatedInventors: Xia Li, Matthew Nowak, Seung H. Kang, Brian Matthew Henderson
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Publication number: 20150302767Abstract: System and methods for receiving an end user input via a brief question-and-answer framework, and using the information to generate a baseline personalized exercise regime and/or enabling an end-user of an online exercise application to change exercise difficulty levels by interacting with a control panel on the application graphical user interface. The end-user may cause the application to retrieve an easier or harder exercise video in order to achieve an adaptable, personalized level of difficulty. For example, if an end user begins watching an exercise of a given difficulty level within a module, the use may input a command to transition to a more (or less) difficult exercise within that module. The application will retrieve a new exercise and present the newly retrieved exercise to the end user. A “storyboard” depicting each of the exercises in the program may be depicted in a small row of tiles below a video player.Type: ApplicationFiled: April 21, 2015Publication date: October 22, 2015Inventors: Matthew Henderson, Blake Henderson
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Patent number: 9165721Abstract: An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”).Type: GrantFiled: July 10, 2014Date of Patent: October 20, 2015Assignees: THE TRUSTEES OF THE STEVENS INSTITUTE OF TECHNOLOGY, THE UNITED STATES OF AMERICA, as represented by the Secretary of the ArmyInventors: Woo Young Lee, Linh Le, De Kong, Matthew Henderson Ervin, James L. Zunino, III, Brian E. Fuchs
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Patent number: 9025316Abstract: An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”).Type: GrantFiled: July 10, 2014Date of Patent: May 5, 2015Assignees: The Trustees of The Stevens Institute of Technology, The United States of America, as Represented by The Secretary of The ArmyInventors: Woo Young Lee, Linh Le, De Kong, Matthew Henderson Ervin, James L. Zunino, III, Brian E. Fuchs
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Publication number: 20150048497Abstract: A photovoltaic (PV) substrate includes a grooved die-facing surface to form a channel for a bypass diode. The die-facing surface supports a screen-printed metal interconnect layer to form a first terminal for the bypass diode.Type: ApplicationFiled: August 16, 2013Publication date: February 19, 2015Applicant: QUALCOMM IncorporatedInventors: Brian Matthew Henderson, Shiqun Gu, Urmi Ray
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Patent number: 8912043Abstract: A stacked integrated circuit (IC) may be manufactured with a second tier wafer bonded to a double-sided first tier wafer. The double-sided first tier wafer includes back-end-of-line (BEOL) layers on a front and a back side of the wafer. Extended contacts within the first tier wafer connect the front side and the back side BEOL layers. The extended contact extends through a junction of the first tier wafer. The second tier wafer couples to the front side of the first tier wafer through the extended contacts. Additional contacts couple devices within the first tier wafer to the front side BEOL layers. When double-sided wafers are used in stacked ICs, the height of the stacked ICs may be reduced. The stacked ICs may include wafers of identical functions or wafers of different functions.Type: GrantFiled: July 18, 2013Date of Patent: December 16, 2014Assignee: QUALCOMM IncorporatedInventors: Arvind Chandrasekaran, Brian Matthew Henderson
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Publication number: 20140334065Abstract: An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”).Type: ApplicationFiled: July 10, 2014Publication date: November 13, 2014Applicants: THE TRUSTEES OF THE STEVENS INSTITUTE OF TECHNOLOGY, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE ARMYInventors: Woo Young Lee, Linh Le, De Kong, Matthew Henderson Ervin, James L. Zunino, III, Brian E. Fuchs
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Publication number: 20140321028Abstract: An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”).Type: ApplicationFiled: July 10, 2014Publication date: October 30, 2014Applicants: THE TRUSTEES OF THE STEVENS INSTITUTE OF TECHNOLOGY, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE ARMYInventors: Woo Young Lee, Linh Le, De Kong, Matthew Henderson Ervin, James L. Zunino, III, Brian E. Fuchs
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Publication number: 20140306349Abstract: Some implementations provide an interposer that includes a substrate, a via in the substrate, and an oxidation layer. The via includes a metal material. The oxidation layer is between the via and the substrate. In some implementations, the substrate is a silicon substrate. In some implementations, the oxidation layer is a thermal oxide formed by exposing the substrate to heat. In some implementations, the oxidation layer is configured to provide electrical insulation between the via and the substrate. In some implementations, the interposer also includes an insulation layer. In some implementations, the insulation layer is a polymer layer. In some implementations, the interposer also includes at least one interconnect on the surface of the interposer. The at least one interconnect is positioned on the surface of the interposer such that the oxidation layer is between the interconnect and the substrate.Type: ApplicationFiled: April 11, 2013Publication date: October 16, 2014Applicant: QUALCOMM IncorporatedInventors: Shiqun Gu, Urmi Ray, Roawen Chen, Brian Matthew Henderson, Ratibor Radojcic, Matthew Nowak, Nicholas Yu
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Publication number: 20140297668Abstract: A data structure stored on a non-transitory medium includes: a first image object and a second image object, each comprising image data and series data corresponding to a series to which the image data belongs; and at least one linking object which is an instance of a linking class which is configured to provide for instantiation of linking objects which each define a link from at least one source to a target, the source corresponding to at least one of a series and a set of image data and the target corresponding solely to a series. The linking object includes target data corresponding to a target series which is other than the series to which the first and second sets of image data belong and source data corresponding to the first image data.Type: ApplicationFiled: April 2, 2013Publication date: October 2, 2014Inventors: ROBERT JOHN TWEEDIE, PAUL MATTHEW HENDERSON, BENJAMIN DAVID PANTER, PETER MAXWELL, RICHARD ANDREW MOFFETT
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Patent number: 8810996Abstract: An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”).Type: GrantFiled: November 21, 2011Date of Patent: August 19, 2014Assignees: The Trustees of the Stevens Institute of Technology, The United States of America, as represented by the Secretary of the ArmyInventors: Woo Young Lee, Linh Le, De Kong, Matthew Henderson Ervin, James L. Zunino, III, Brian E. Fuchs
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Publication number: 20140225246Abstract: Some implementations provide an integrated device that includes a first substrate, a first die coupled to the first substrate, a second die coupled to the first die, and a second substrate coupled to the second die. The second substrate is configured to provide an electrical path for a signal to the second die. The integrated device further includes a molding surrounding the first die and the second die, and several through mold vias (TMVs) coupled to the second substrate. The TMVs are configured to provide an electrical path for the signal to the second die through the second substrate. In some implementations, the second substrate includes a signal distribution structure configured to provide the electrical path for the signal to the second die. In some implementations, the first substrate and the second substrate are part of a signal distribution network that provides signal to the second die.Type: ApplicationFiled: December 18, 2013Publication date: August 14, 2014Applicant: QUALCOMM INCORPORATEDInventors: Brian Matthew Henderson, Durodami Joscelyn Lisk, Shiqun Gu, Ratibor Radojcic, Matthew Michael Nowak
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Patent number: 8618539Abstract: An interconnect sensor for detecting delamination due to coefficient of thermal expansion mismatch and/or mechanical stress. The sensor comprises a conductive path that includes a via disposed between two back end of line metal layers separated by a dielectric. The via is coupled between a first probe structure and a second probe structure and mechanically coupled to a stress inducing structure. The via is configured to alter the conductive path in response to mechanical stress caused by the stress inducing structure. The stress inducing structure can be a through silicon via or a solder ball. The dielectric material can be a low-k dielectric material. In another embodiment, a method of forming an interconnect sensor is provided for detecting delamination.Type: GrantFiled: November 5, 2009Date of Patent: December 31, 2013Assignee: QUALCOMM IncorporatedInventors: Brian Matthew Henderson, Shiqun Gu, Homyar C. Mogul, Mark M. Nakamoto, Arvind Chandrasekaran
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Publication number: 20130302943Abstract: A stacked integrated circuit (IC) may be manufactured with a second tier wafer bonded to a double-sided first tier wafer. The double-sided first tier wafer includes back-end-of-line (BEOL) layers on a front and a back side of the wafer. Extended contacts within the first tier wafer connect the front side and the back side BEOL layers. The extended contact extends through a junction of the first tier wafer. The second tier wafer couples to the front side of the first tier wafer through the extended contacts. Additional contacts couple devices within the first tier wafer to the front side BEOL layers. When double-sided wafers are used in stacked ICs, the height of the stacked ICs may be reduced. The stacked ICs may include wafers of identical functions or wafers of different functions.Type: ApplicationFiled: July 18, 2013Publication date: November 14, 2013Inventors: Arvind Chandrasekaran, Brian Matthew Henderson
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Publication number: 20130298019Abstract: Systems and methods for enabling an end-user of an online exercise application to change exercise difficulty levels by interacting with a control panel on the application graphical user interface. The end-user may cause the application to retrieve an easier or harder exercise video in order to achieve an adaptable, personalized level of difficulty. For example, if an end user begins watching an exercise of a given difficulty level within a module, the use may input a command to transition to a more (or less) difficult exercise within that module. The application will retrieve a new exercise and present the newly retrieved exercise to the end user. A “storyboard” depicting each of the exercises in the program may be depicted in a small row of tiles below a video player.Type: ApplicationFiled: May 1, 2013Publication date: November 7, 2013Applicant: PrimeWellness LLCInventor: Matthew Henderson
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Patent number: 8536893Abstract: A circuit for recording a magnitude of an ESD event during semiconductor assembly includes a voltage divider connected between an input and a ground. The circuit also includes a measurement block having a recorder device. Each measurement block receives current from a segment of the voltage divider. The magnitude of the ESD event is determined based upon a read-out of the measurement devices after the ESD event. The recorder device may be a capacitor that would be damaged during the ESD event. During the ESD event the capacitor may be damaged. Reading out the recorder device determines if the magnitude of the ESD event exceeded a threshold magnitude that damages the capacitor.Type: GrantFiled: October 13, 2009Date of Patent: September 17, 2013Assignee: QUALCOMM IncorporatedInventors: Eugene R. Worley, Brian Matthew Henderson
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Patent number: 8508301Abstract: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.Type: GrantFiled: November 11, 2011Date of Patent: August 13, 2013Assignee: QUALCOMM IncorporatedInventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-Eoan, Seyfollah S. Bazarjani, Matthew Nowak