Patents by Inventor Matti Floman
Matti Floman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240152274Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.Type: ApplicationFiled: October 13, 2023Publication date: May 9, 2024Applicant: Memory Technologies LLCInventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
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Patent number: 11797180Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.Type: GrantFiled: December 23, 2020Date of Patent: October 24, 2023Assignee: Memory Technologies LLCInventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
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Publication number: 20210191618Abstract: A method includes, in one non-limiting embodiment, receiving a command originating from an initiator at a controller associated with a non-volatile mass memory coupled with a host device, the command being a command to write data that is currently resident in a memory of the host device to the non-volatile mass memory; moving the data that is currently resident in the memory of the host device from an original location to a portion of the memory allocated for use at least by the non-volatile mass memory; and acknowledging to the initiator that the command to write the data to the non-volatile mass memory has been executed. An apparatus configured to perform the method is also described.Type: ApplicationFiled: December 23, 2020Publication date: June 24, 2021Applicant: Memory Technologies LLCInventors: Kimmo J. Mylly, Jani J. Klint, Jani Hyvonen, Tapio Hill, Jukka-Pekka Vihmalo, Matti Floman
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Patent number: 9520200Abstract: The invention relates to a method comprising measuring the temperature of at least one location of a non-volatile memory; determining if said temperature measurement indicates that the data retention time of data stored at said at least one location is reduced below a threshold; and re-writing said data to said non-volatile memory in a response to a positive determination.Type: GrantFiled: November 6, 2015Date of Patent: December 13, 2016Assignee: Memory Technologies LLCInventors: Janne Tapani Nurminen, Kimmo J. Mylly, Matti Floman
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Publication number: 20160085680Abstract: Examples of enabling cache read optimization for mobile memory devices are described. One or more access commands may be received, from a host, at a memory device. The one or more access commands may instruct the memory device to access at least two data blocks. The memory device may generate pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.Type: ApplicationFiled: December 3, 2015Publication date: March 24, 2016Inventors: Matti Floman, Kimmo J. Mylly
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Publication number: 20160071611Abstract: The invention relates to a method comprising measuring the temperature of at least one location of a non-volatile memory; determining if said temperature measurement indicates that the data retention time of data stored at said at least one location is reduced below a threshold; and re-writing said data to said non-volatile memory in a response to a positive determination.Type: ApplicationFiled: November 6, 2015Publication date: March 10, 2016Inventors: Janne Tapani Nurminen, Kimmo J. Mylly, Matti Floman
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Publication number: 20160062659Abstract: A memory controller of a mass memory device determining that a memory operation has been initiated which involves the mass memory device, and in response dynamically checks for available processing resources of a host device that is operatively coupled to the mass memory device and thereafter puts at least one of the available processing resources into use for performing the memory operation. In various non-limiting examples: the available processing resources may be a core engine of a multi-core CPU, a DPS or a graphics processor; central processing unit; a digital signal processor; and a graphics processor; and it may also be dynamically checked whether memory resources of the host are available and those can be similarly put into use (e.g., write data to a DRAM of the host, process data in the DRAM with the host DSP, then write the processed data to the mass memory device).Type: ApplicationFiled: September 23, 2015Publication date: March 3, 2016Inventors: Matti Floman, Kimmo J. Mylly
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Patent number: 9223707Abstract: Examples of enabling cache read optimization for mobile memory devices are described. One or more access commands may be received, from a host, at a memory device. The one or more access commands may instruct the memory device to access at least two data blocks. The memory device may generate pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.Type: GrantFiled: September 6, 2013Date of Patent: December 29, 2015Assignee: Memory Technologies LLCInventors: Matti Floman, Kimmo J. Mylly
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Patent number: 9190165Abstract: The invention relates to a method comprising measuring the temperature of at least one location of a non-volatile memory; determining if said temperature measurement indicates that the data retention time of data stored at said at least one location is reduced below a threshold; and re-writing said data to said non-volatile memory in a response to a positive determination.Type: GrantFiled: February 9, 2015Date of Patent: November 17, 2015Assignee: Memory Technologies LLCInventors: Janne Tapani Nurminen, Kimmo J. Mylly, Matti Floman
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Patent number: 9164804Abstract: A memory controller of a mass memory device determining that a memory operation has been initiated which involves the mass memory device, and in response dynamically checks for available processing resources of a host device that is operatively coupled to the mass memory device and thereafter puts at least one of the available processing resources into use for performing the memory operation. In various non-limiting examples: the available processing resources may be a core engine of a multi-core CPU, a DPS or a graphics processor; central processing unit; a digital signal processor; and a graphics processor; and it may also be dynamically checked whether memory resources of the host are available and those can be similarly put into use (e.g., write data to a DRAM of the host, process data in the DRAM with the host DSP, then write the processed data to the mass memory device).Type: GrantFiled: June 20, 2012Date of Patent: October 20, 2015Assignee: Memory Technologies LLCInventors: Matti Floman, Kimmo Mylly
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Patent number: 9117531Abstract: A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at least in part on 1) the indication, 2) a current configuration for each of the one or more memory cells and 3) a program-erase count for each of the one or more memory cells. The method also includes determining a new configuration for each of the selected one or more memory cells. For each of the selected one or more memory cells, the configuration of the memory cell is changed from the current configuration to the determined new configuration. Apparatus and computer readable media are also disclosed.Type: GrantFiled: February 28, 2014Date of Patent: August 25, 2015Assignee: Memory Technologies LLCInventors: Matti Floman, Kimmo J. Mylly
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Publication number: 20150221386Abstract: The invention relates to a method comprising measuring the temperature of at least one location of a non-volatile memory; determining if said temperature measurement indicates that the data retention time of data stored at said at least one location is reduced below a threshold; and re-writing said data to said non-volatile memory in a response to a positive determination.Type: ApplicationFiled: February 9, 2015Publication date: August 6, 2015Inventors: Janne Yapani Nurminen, Kimmo J. Mylly, Matti Floman
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Publication number: 20140181382Abstract: A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at least in part on 1) the indication, 2) a current configuration for each of the one or more memory cells and 3) a program-erase count for each of the one or more memory cells. The method also includes determining a new configuration for each of the selected one or more memory cells. For each of the selected one or more memory cells, the configuration of the memory cell is changed from the current configuration to the determined new configuration. Apparatus and computer readable media are also disclosed.Type: ApplicationFiled: February 28, 2014Publication date: June 26, 2014Applicant: Memory Technologies LLCInventors: Matti Floman, Kimmo J. Mylly
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Patent number: 8671240Abstract: A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at least in part on 1) the indication, 2) a current configuration for each of the one or more memory cells and 3) a program-erase count for each of the one or more memory cells. The method also includes determining a new configuration for each of the selected one or more memory cells. For each of the selected one or more memory cells, the configuration of the memory cell is changed from the current configuration to the determined new configuration. Apparatus and computer readable media are also disclosed.Type: GrantFiled: July 18, 2011Date of Patent: March 11, 2014Assignee: Memory Technologies LLCInventors: Matti Floman, Kimmo Mylly
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Patent number: 8635394Abstract: Accessing data stored in a memory device through an interface, with addressing data on the memory device through at least one address bus, controlling at least data flow to and from the memory device through at least one command bus, and transferring data to and from the memory through at least one data bus wherein commands on the command bus are adjusted depending on the type of memory connected to the interface.Type: GrantFiled: November 28, 2007Date of Patent: January 21, 2014Assignee: Nokia CorporationInventors: Jani Klint, Sakari Sippola, Matti Floman, Jukka-Pekka Vihmalo
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Publication number: 20140006719Abstract: Examples of enabling cache read optimization for mobile memory devices are described. One or more access commands may be received, from a host, at a memory device. The one or more access commands may instruct the memory device to access at least two data blocks. The memory device may generate pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.Type: ApplicationFiled: September 6, 2013Publication date: January 2, 2014Applicant: Memory Technologies LLCInventors: Matti Floman, Kimmo J. Mylly
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Publication number: 20130346668Abstract: A memory controller of a mass memory device determining that a memory operation has been initiated which involves the mass memory device, and in response dynamically checks for available processing resources of a host device that is operatively coupled to the mass memory device and thereafter puts at least one of the available processing resources into use for performing the memory operation. In various non-limiting examples: the available processing resources may be a core engine of a multi-core CPU, a DPS or a graphics processor; central processing unit; a digital signal processor; and a graphics processor; and it may also be dynamically checked whether memory resources of the host are available and those can be similarly put into use (e.g., write data to a DRAM of the host, process data in the DRAM with the host DSP, then write the processed data to the mass memory device).Type: ApplicationFiled: June 20, 2012Publication date: December 26, 2013Inventors: Matti Floman, Kimmo Mylly
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Patent number: 8560778Abstract: A method for enabling cache read optimization for mobile memory devices is described. The method includes receiving one or more access commands, at a memory device from a host, the one or more access commands instructing the memory device to access at least two data blocks. The at least two data blocks are accessed. The method includes generating, by the memory device, pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks. Apparatus and computer readable media are also described.Type: GrantFiled: July 11, 2011Date of Patent: October 15, 2013Assignee: Memory Technologies LLCInventors: Matti Floman, Kimmo Mylly
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Publication number: 20130024601Abstract: A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at least in part on 1) the indication, 2) a current configuration for each of the one or more memory cells and 3) a program-erase count for each of the one or more memory cells. The method also includes determining a new configuration for each of the selected one or more memory cells. For each of the selected one or more memory cells, the configuration of the memory cell is changed from the current configuration to the determined new configuration. Apparatus and computer readable media are also disclosed.Type: ApplicationFiled: July 18, 2011Publication date: January 24, 2013Inventors: Matti Floman, Kimmo Mylly
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Publication number: 20130019065Abstract: A method for enabling cache read optimization for mobile memory devices is described. The method includes receiving one or more access commands, at a memory device from a host, the one or more access commands instructing the memory device to access at least two data blocks. The at least two data blocks are accessed. The method includes generating, by the memory device, pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks. Apparatus and computer readable media are also described.Type: ApplicationFiled: July 11, 2011Publication date: January 17, 2013Inventors: Matti Floman, Kimmo Mylly