Patents by Inventor Michael Thomas Benhase

Michael Thomas Benhase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6745262
    Abstract: Disclosed is a method, system, program, and data structure for queuing requests. Each request is associated with one of a plurality of priority levels. A queue is generated including a plurality of entries. Each entry corresponds to a priority level and a plurality of requests can be queued at one entry. When a new request having an associated priority is received to enqueue on the queue, a determination is made of an entry pointed to by a pointer. The priority associated with the new request is adjusted by a value such that the adjusted priority is associated with an entry different from the entry pointed to by the pointer. The new request is queued at one entry associated with the adjusted priority.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: June 1, 2004
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, James Chienchiung Chen
  • Publication number: 20030233613
    Abstract: Provided are a method, system, and an article of manufacture for preventing data loss. Modified data is stored in a volatile storage. The stored modified data is copied onto a non-volatile storage. A determination is made as to whether the non-volatile storage should be checked for errors. In certain implementations, on determining that the nonvolatile storage should be checked for errors the non-volatile storage is checked for errors. If on checking the non-volatile storage is found to have an error, an indication of the error is provided.
    Type: Application
    Filed: June 12, 2002
    Publication date: December 18, 2003
    Applicant: International Business Machines Corporation
    Inventors: Kevin John Ash, Michael Thomas Benhase, Carol Santich Mellgren, Brian Anthony Rinaldi, Kenneth Wayne Todd
  • Patent number: 6665743
    Abstract: Provided is a method, system, and program for configuring an attached storage device through a storage adaptor. The storage adaptor includes an initialization routine to generate initialization data to write to the storage device when adding storage space in the storage device to a system. A request is received to add storage space to the system. A command is transmitted to the storage adaptor capable of inhibiting the storage adaptor from performing the initialization routine. Initialization data is generated for the storage space and transmitted to the storage adaptor to write to the storage space to initialize the storage space.
    Type: Grant
    Filed: April 18, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, David Alan Burton, Robert Louis Morton
  • Patent number: 6658542
    Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6636913
    Abstract: A method and system for controlling access to a bus for transferring data in the form of multibyte data streams. Data transfer agents are coupled to and request access to the bus to transfer data thereon. The system for controlling access to the bus comprises a bus arbiter responsive to the access requests of the data transfer agents, granting access to the bus to one data transfer agent at a time. A data length counter accumulates, during the grant of access, signals indicating the length of the data transferred between the bus and the data transfer agent. The data length counter indicates completion of the transfer of a predetermined length of data, and bus arbiter logic responds to the data length counter indicating the transfer completion, causing the bus arbiter to terminate the grant of access to the data transfer agent. The control of access to the bus is thus based on the precise measurement of the length of the transferred data, rather than on timers.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: October 21, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gary William Batchelor, Michael Thomas Benhase, Joseph Smith Hyde, II, Robert Earl Medlin, Juan Antonio Yanes
  • Patent number: 6578102
    Abstract: A system and method track and control the prefetching of blocks of a data stream in a PCI bus system, avoiding unnecessary prefetches. The data stream is grouped into major blocks which comprise a fixed plurality of contiguous blocks. A prefetch buffer stores the blocks of data prefetched from a PCI data source for transfer to a requester. First and second associated prefetch count storage locations store first and second counts initialized by prefetch initialization logic. The first count represents the number of blocks of data of a major block of the data, and the second count represents the total number of the blocks of the data stream to be prefetched, less the initialized number of blocks of the first count. As each block of data is prefetched, a prefetch counter decrements the first count by a number representing the block of data.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: June 10, 2003
    Assignee: International Business Machines Corporation
    Inventors: Gary William Batchelor, Michael Thomas Benhase
  • Publication number: 20030105928
    Abstract: Provided is a method, system, and program for destaging data from a first computer readable medium to a second computer readable medium. A list of entries indicating data blocks in the first computer readable medium is scanned. For each entry scanned, a determination is made as to whether the data block indicated in the scanned entry satisfies a criteria. If the data block indicated in the scanned entry satisfies the criteria, then a destage operation is called to destage the data block in the scanned entry from the first computer readable medium to the second computer readable medium. If the called destage operation is not initiated, then the scanned entry is removed from the cache list. The removed scanned entry is added to one destage wait list. During one destage operation, data blocks indicated in entries in the destage wait list are destaged.
    Type: Application
    Filed: December 4, 2001
    Publication date: June 5, 2003
    Applicant: International Business Machines Corporation
    Inventors: Kevin John Ash, Brent Cameron Beardsley, Michael Thomas Benhase, Joseph Smith Hyde, Thomas Charles Jarvis, Steven Robert Lowe, David Frank Mannenbach
  • Publication number: 20030070041
    Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.
    Type: Application
    Filed: November 13, 2002
    Publication date: April 10, 2003
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Robert Louis Morton, Kenneth Wayne Todd
  • Publication number: 20030061264
    Abstract: Provided is a method, system, and program for allocating processor resources to a first and second types of tasks. An allocation of processor resources to the first and second types of tasks is indicated. Data is gathered indicating a first workload level for the first type of tasks and a second workload level for the second type of tasks. A determination is made of a change to the indicated allocation of processor resources to the fist and second types of tasks based on at least one of the first workload level and second workload level data. Tasks of the first type are dispatched to the processor resources allocated to the first type and tasks of the second type are dispatched to the processor resources allocated to the second type.
    Type: Application
    Filed: September 21, 2001
    Publication date: March 27, 2003
    Applicant: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, YuCheng Hsu
  • Patent number: 6535937
    Abstract: A method and system to verify the passage of one or more write commands sent from an originating location through a PCI bus system. An addressable data storage is located substantially at the end of the PCI bus system with respect to the originating location. A write command is sent by the originator subsequent to the one or more write commands, to a predetermined special end location address identifying the addressable storage. The command is accompanied by data comprising a predetermined special return address at the originating location. The PCI bus system transmits the write commands on a FIFO basis, so the one or more write commands precede the subsequently sent write command. Logic senses the subsequently sent write command, and responds to the command, sending a return echo write command to the predetermined special return address. The returning echo write command verifies the passage of the write commands and data through the PCI bus system.
    Type: Grant
    Filed: February 15, 2000
    Date of Patent: March 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Russell Lee Ellison, Gregg Steven Lucas, Juan Antonio Yanes
  • Publication number: 20030051113
    Abstract: Disclosed is a method, system, and article of manufacture for managing meta data. The meta data provides information on data maintained in a storage device. The system receives a request for meta data from a process and determines whether the requested meta data is in cache. After determining that the requested meta data is not in cache, the system determines whether there are a sufficient number of allocatable segments in cache to stage in the meta data and allocates segments in cache to store the meta data after determining that there are enough allocatable segments in cache. The system stages the requested meta data into the allocated segments. Alternatively, after determining that the requested meta data is in cache, the system determines whether a second process has exclusive access to the meta data in cache. After determining that the second process does not have exclusive access, the system indicates to the first process that access to the meta data is permitted.
    Type: Application
    Filed: October 11, 2002
    Publication date: March 13, 2003
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6530043
    Abstract: In a PCI bus system, a method and system check for errors in rite data transferred from a PCI data source across a PCI bus to the PCI bus system, the data comprising a plurality of blocks. Redundancy calculation logic receives the write data across the PCI bus, calculates a check value for each block of the data transferred across the PCI bus, and updating any previously calculated check value with the calculated check value at a storage location of a storage memory. Data path logic is coupled to the PCI bus and to the storage memory, and responds to a unique identifier of a redundancy write command sent subsequent to completion of the transfer of the write data across the PCI interface. The data path logic responds to the write command unique identifier, detecting the updated calculated check value at the storage location of the storage memory.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Gregg Steven Lucas, Juan Antonio Yanes
  • Publication number: 20030037204
    Abstract: Provided is a method, system, and program for caching updates to one target storage device in a first and second memories, wherein the target storage device is one of a plurality of storage devices. A determination is made of an allocation of available space in the second memory to the storage devices, wherein a total of the allocation of the available space to all the storage devices exceeds one hundred percent of the available space in the second memory. An update to one target storage device is received and then a determination is made as to whether adding the update to the second memory will exceed the allocation of available space for the target storage device in the second memory. One copy of the update is written to the second memory if adding the update to the second memory will not exceed the allocation of available space for the target storage device.
    Type: Application
    Filed: August 17, 2001
    Publication date: February 20, 2003
    Applicant: International Business Machines Corporation
    Inventors: Kevin John Ash, Brent Cameron Beardsley, Michael Thomas Benhase
  • Publication number: 20030023781
    Abstract: A method to simultaneously configure a plurality of adapters disposed within a computer system, where that computer system includes one or more external computers, and/or one or more data input devices, and/or one or more data output devices, and/or one or more data storage devices. A computer system which includes a computer useable medium having computer readable program code disposed therein to implement Applicants' method to simultaneously configure a plurality of adapters disposed within said computer system. A computer program product usable with a programmable computer processor having computer readable program code embodied therein for simultaneously configuring a plurality of adapters disposed within a computer system.
    Type: Application
    Filed: July 25, 2001
    Publication date: January 30, 2003
    Inventors: Michael Thomas Benhase, Brian Jeffrey Corcoran, Matthew Joseph Kalos
  • Patent number: 6513097
    Abstract: Disclosed is a system and method for caching data. A processor receives data from a host to modify a track in a first storage device. The processor stores a copy of the modified data in a cache and indicates in a second storage device the tracks for which there is modified data in cache. During data recovery operations, the processor processes the second storage device and data therein to determine the tracks for which there was modified data in cache. The processor then marks the determined tracks as failed to prevent data at the determined tracks in the first storage device from being returned in response to a read request until the failure is resolved. In further embodiments, in response to detecting a partial failure within the storage system, the processor would scan the cache to determine tracks for which there is modified data stored in the cache.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: January 28, 2003
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6502174
    Abstract: Disclosed is a method, system, and article of manufacture for managing meta data. The meta data provides information on data maintained in a storage device. The system receives a request for meta data from a process and determines whether the requested meta data is in cache. After determining that the requested meta data is not in cache, the system determines whether there are a sufficient number of allocatable segments in cache to stage in the meta data and allocates segments in cache to store the meta data after determining that there are enough allocatable segments in cache. The system stages the requested meta data into the allocated segments. Alternatively, after determining that the requested meta data is in cache, the system determines whether a second process has exclusive access to the meta data in cache. After determining that the second process does not have exclusive access, the system indicates to the first process that access to the meta data is permitted.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: December 31, 2002
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6490647
    Abstract: A system and method for flushing stale data from a read prefetch buffer of a PCI bus system which transfers data in the form of data streams of contiguous blocks. The PCI bus system comprises a channel adapter at one PCI bus that issues read commands, a data source coupled to a second PCI bus, and a prefetch buffer that prefetches the blocks of read data. A prefetch counter posts the remaining number blocks to be read and transferred, posting the prefetch count at a storage location of a storage memory mapped to a prefetch location in the prefetch buffer. The prefetch count is written to the storage location by a prefetch count write command. The system for flushing stale data from the prefetch buffer comprises a key detector for sensing an unique identifier of the prefetch count write command.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: December 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Gary William Batchelor, Michael Thomas Benhase
  • Publication number: 20020156944
    Abstract: Provided is a method, system, and program for configuring an attached storage device through a storage adaptor. The storage adaptor includes an initialization routine to generate initialization data to write to the storage device when adding storage space in the storage device to a system. A request is received to add storage space to the system. A command is transmitted to the storage adaptor capable of inhibiting the storage adaptor from performing the initialization routine. Initialization data is generated for the storage space and transmitted to the storage adaptor to write to the storage space to initialize the storage space.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 24, 2002
    Applicant: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, David Alan Burton, Robert Louis Morton
  • Publication number: 20020138695
    Abstract: Disclosed is a method, system, and article of manufacture for processing modified meta data for data recovery operations. The meta data provides information on user data maintained in a storage device. The system determines whether meta data tracks maintained in a cache were modified and indicates in a non-volatile memory that the determined meta data tracks were modified. Data recovery operations may be initiated as a result of a system failure, such as a warmstart or coldstart recovery. During such data recovery operations, the system processes the non-volatile memory and the indications of modified meta data tracks therein to rebuild lost meta data tracks in the cache.
    Type: Application
    Filed: May 9, 2002
    Publication date: September 26, 2002
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6438661
    Abstract: Disclosed is a method, system, and article of manufacture for processing modified meta data for data recovery operations. The meta data provides information on user data maintained in a storage device. The system determines whether meta data tracks maintained in a cache were modified and indicates in a non-volatile memory that the determined meta data tracks were modified. Data recovery operations may be initiated as a result of a system failure, such as a warmstart or coldstart recovery. During such data recovery operations, the system processes the non-volatile memory and the indications of modified meta data tracks therein to rebuild lost meta data tracks in the cache.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: August 20, 2002
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Kenneth Wayne Todd