Patents by Inventor Michael Thomas Benhase

Michael Thomas Benhase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6425050
    Abstract: Disclosed is a method, system, and program for processing data access requests, such as read requests, to a storage location maintained in both a first storage, such as a cache, area and second storage area, such as a disk drive, during a destage operation. A destage operation is granted access to the storage location to destage data from the storage location in the first storage area to the second storage area. During the destage operation, a data access request is granted access to the storage location.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: July 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Thomas Charles Jarvis, Robert Louis Morton, Kenneth Wayne Todd
  • Patent number: 6381677
    Abstract: Disclosed is a system for caching data. After determining a sequential access of a first memory area, such as a direct access storage device (DASD), a processing unit stages a group of data sets from the first memory area to a second memory, such as cache. The processing unit processes a data access request (DAR) for data sets in the first memory area that are included in the sequential access and reads the requested data sets from the second memory area. The processing unit determines trigger data set from a plurality of trigger data sets based on a trigger data set criteria. The processing unit then stages a next group of data sets from the first memory area to the second memory area in response to reading the determined trigger data set.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: April 30, 2002
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Joseph Smith Hyde, Thomas Charles Jarvis, Douglas A. Martin, Robert Louis Morton
  • Patent number: 6327644
    Abstract: Disclosed is a system for managing data in cache. A list of data entries in a first memory area has a first end and a second end, such as a most recently used (MRU) end and least recently used (LRU) end. A first pointer addresses a data entry in the list and a second pointer addresses another data entry in the list that is not at the first and second ends. Data from a second memory area is provided to add to the list. A determination is made as to whether the provided data to add to the list is one of a first type and second type of data, such as sequentially accessed data or non-sequentially accessed data. The provided data is stored in the first memory area as a new data entry in the list. The first pointer is modified to address the new data entry after determining that the provided data is of the first type. After determining that the provided data is of the second type, the second pointer is processed to determine where to add the new data entry to the list between the first and second ends.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: December 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Mark A. Reid
  • Patent number: 6324621
    Abstract: Aspects for caching storage data include partitioning a storage cache to include a compressed data partition and an uncompressed data partition, and adjusting a size of the compressed data partition and the uncompressed data partition for chosen performance characteristics. A data caching system aspect in a data processing system having a host system in communication with a storage system includes at least one storage device and at least one partially compressed cache. The at least one partially compressed cache further includes an uncompressed partition and a compressed partition, where the compressed partition stores at least a victim data unit from the uncompressed partition.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: November 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Shanker Singh, Joe-Ming Cheng, Brent Cameron Beardsley, Dell Patrick Leabo, Forrest Lee Wade, Michael Thomas Benhase, Marc Ethan Goldfeder
  • Publication number: 20010001872
    Abstract: Aspects for caching storage data include partitioning a storage cache to include a compressed data partition and an uncompressed data partition, and adjusting a size of the compressed data partition and the uncompressed data partition for chosen performance characteristics. A data caching system aspect in a data processing system having a host system in communication with a storage system includes at least one storage device and at least one partially compressed cache. The at least one partially compressed cache further includes an uncompressed partition and a compressed partition, where the compressed partition stores at least a victim data unit from the uncompressed partition.
    Type: Application
    Filed: June 10, 1998
    Publication date: May 24, 2001
    Applicant: INTERNATIONAL BUSINESS MACHINES CORP.
    Inventors: SHANKER SINGH, JOE-MING CHENG, BRENT CAMERON BEARDSLEY, DELL PATRICK LEABO, FORREST LEE WADE, MICHAEL THOMAS BENHASE, MARC ETHAN GOLDFEDER
  • Patent number: 6189117
    Abstract: Disclosed is a system for handling errors. A system managed by a processor processes an error in the system. The system then generates an interrupt to the processor indicating that an error occurred and executes an error mode before the processor interprets the interrupt. As part of the error mode, the system prevents data from transferring between the system and the processor and processes a read request from the processor to the system by returning data to the processor unrelated to the requested data. The processor would then process the interrupt indicating the error and execute a diagnostic mode to diagnose the error in the system.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gary William Batchelor, Brent Cameron Beardsley, Michael Thomas Benhase, Jack Harvey Derenburger, Carl Evan Jones, Robert Earl Medlin, Belayneh Tafesse, Juan Antonio Yanes
  • Patent number: 6141731
    Abstract: Disclosed is a cache management scheme using multiple data structure. A first and second data structures, such as linked lists, indicate data entries in a cache. Each data structure has a most recently used (MRU) entry, a least recently used (LRU) entry, and a time value associated with each data entry indicating a time the data entry was indicated as added to the MRU entry of the data structure. A processing unit receives a new data entry. In response, the processing unit processes the first and second data structures to determine a LRU data entry in each data structure and selects from the determined LRU data entries the LRU data entry that is the least recently used. The processing unit then demotes the selected LRU data entry from the cache and data structure including the selected data entry. The processing unit adds the new data entry to the cache and indicates the new data entry as located at the MRU entry of one of the first and second data structures.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: October 31, 2000
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Douglas A. Martin, Robert Louis Morton, Mark A. Reid
  • Patent number: 6035347
    Abstract: A data storage system and method for securely storing data includes (a) a host CPU; (b) a non-volatile storage (NVS) memory for storing data; (c) a processor, the processor being coupled to the host CPU and the NVS memory and monitoring availability of space in the NVS memory and in a non-volatile buffer (NV-Buffer); and (d) the NV-Buffer, the NV-Buffer being coupled to the host CPU, the NVS memory, and the processor, upon receiving a request to write data into the NVS memory, the host CPU storing data to be transferred to the NVS memory into the NV-Buffer, and upon receiving a confirmation message that data of a write operation to the NV-Buffer is committed, the NV-Buffer transferring the data to the NVS memory. The NVS memory includes a fast dump space for storing data transferred from the NV-Buffer when a main power is down and for restoring back data from the NVS memory to the NV-Buffer when the power is up.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: March 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Forrest Lee Wade
  • Patent number: 5930481
    Abstract: A system for providing multiple hosts with concurrent access to cached data by selectively generating, maintaining, modifying, and consolidating multiple versions of data items in cache memory to efficiently accommodate data access requests by the hosts. Data associated with a logical track is represented in cache by a number of cache track image parts. Each part represents one or more records in cache, where multiple parts may exist in cache for the same logical track. The provision of multiple parts supports concurrent access by multiple operations or "processes" to data associated with a track. Namely, each part is given a "status" selected from a predetermined catalog of statuses; the assigned status thus establishes the permissible manner of accessing that part. Depending upon a part's status, the part may be used by one process (e.g. Read) or by multiple processes concurrently (e.g. Read and Destage). Other part statuses dedicate a part to a single process (e.g. Write).
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: July 27, 1999
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, David Alan Burton, Marshall Heyman, John Norbert McCauley, Robert Louis Morton
  • Patent number: 5893918
    Abstract: A method for operating a controller for a plurality of direct access storage devices to minimize rotational misses during data transfer operations. Transferred data is staged into a controller cache when a rotational position sensing miss avoidance reconnection is made. Circumstances are detailed for qualifying an operation pending on direct access storage devices for treatment as miss avoidance candidates. Adjustment of controller response depending upon foreknowledge that a channel command word chain includes a write operation is also accomplished utilizing the present method.
    Type: Grant
    Filed: May 18, 1992
    Date of Patent: April 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Susan Marie Wethington
  • Patent number: 5774682
    Abstract: A system for providing multiple hosts with concurrent access to cached data by selectively generating, maintaining, modifying, and consolidating multiple versions of data items in cache memory to efficiently accommodate data access requests by the hosts. Data associated with a logical track is represented in cache by a number of cache track image parts. Each part represents one or more records in cache, where multiple parts may exist in cache for the same logical track. The provision of multiple parts supports concurrent access by multiple operations or "processes" to data associated with a track. Namely, each part is given a "status" selected from a predetermined catalog of statuses; the assigned status thus establishes the permissible manner of accessing that part. Depending upon a part's status, the part may be used by one process (e.g. Read) or by multiple processes concurrently (e.g. Read and Destage). Other part statuses dedicate a part to a single process (e.g. Write).
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: June 30, 1998
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, David Alan Burton, Marshall Heyman, John Norbert McCauley, Robert Louis Morton
  • Patent number: 5721898
    Abstract: A method and system for enhancing the efficiency of communication between one or more host computers and a storage system controller during a data search within either the associated storage systems or within the storage system controller itself. A storage system controller, coupled to one or more host computers via multiple communication channels, is utilized to control access to one or more direct access storage devices. A host computer authorizes the storage system controller to search within a range of data locations within the storage system, sets an initial location from which the data search will begin, and specifies a key field argument to search for. The host computer then permits the storage system controller to independently search the authorized range of data locations within the storage system or within cache memory within the storage system controller.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: February 24, 1998
    Assignee: International Business Machines Corporation
    Inventors: Brent Cameron Beardsley, Michael Thomas Benhase, Lawrence Carter Blount, Susan Kay Candelaria, Joseph Smith Hyde