Patents by Inventor Mikio Yukawa

Mikio Yukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150144858
    Abstract: The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.
    Type: Application
    Filed: February 5, 2015
    Publication date: May 28, 2015
    Inventors: Shunpei YAMAZAKI, Hiroko ABE, Yukie NEMOTO, Ryoji NOMURA, Mikio YUKAWA
  • Patent number: 8994086
    Abstract: The invention provides a semiconductor device which is non-volatile, easily manufactured, and can be additionally written. A semiconductor device of the invention includes a plurality of transistors, a conductive layer which functions as a source wiring or a drain wiring of the transistors, and a memory element which overlaps one of the plurality of transistors, and a conductive layer which functions as an antenna. The memory element includes a first conductive layer, an organic compound layer and a phase change layer, and a second conductive layer stacked in this order. The conductive layer which functions as an antenna and a conductive layer which functions as a source wiring or a drain wiring of the plurality of transistors are provided on the same layer.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroko Abe, Yukie Nemoto, Ryoji Nomura, Mikio Yukawa
  • Publication number: 20150064565
    Abstract: The formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. A manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.
    Type: Application
    Filed: October 7, 2014
    Publication date: March 5, 2015
    Inventors: Hiroatsu TODORIKI, Yumiko SAITO, Takahiro KAWAKAMI, Kuniharu NOMOTO, Mikio YUKAWA
  • Patent number: 8883351
    Abstract: The formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. A manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroatsu Todoriki, Yumiko Saito, Takahiro Kawakami, Kuniharu Nomoto, Mikio Yukawa
  • Patent number: 8865511
    Abstract: It is an object of the present invention to provide a technique in which a high-performance and high reliable memory device and a semiconductor device provided with the memory device are manufactured at low cost with high yield. The semiconductor device includes an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator. Further, the semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound over the first conductive layer to form an organic compound layer including an insulator, and forming a second conductive layer over the organic compound layer including an insulator.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: October 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nobuharu Ohsawa, Ryoji Nomura, Yoshinobu Asami
  • Publication number: 20140295068
    Abstract: To provide a storage battery electrode including an active material layer with high density that contains a smaller percentage of conductive additive. To provide a storage battery having a higher capacity per unit volume of an electrode with the use of the electrode for a storage battery. A slurry that contains an active material and graphene oxide is applied to a current collector and dried to form an active material layer over the current collector, the active material layer over the current collector is rolled up together with a spacer, and a rolled electrode which includes the spacer are immersed in a reducing solution so that graphene oxide is reduced.
    Type: Application
    Filed: March 20, 2014
    Publication date: October 2, 2014
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kenryo NANBA, Mikio YUKAWA
  • Patent number: 8847209
    Abstract: The present invention provides a memory device and a semiconductor device which have high reliability for writing at low cost. Furthermore, the present invention provides a memory device and a semiconductor device having a non-volatile memory element in which data can be additionally written and which can prevent forgery due to rewriting and the like. The memory element includes a first conductive layer, a second conductive layer, and an organic compound layer, which is formed between the first conductive layer and the second conductive layer, and which has a photosensitized oxidation reduction agent which can be an excited state by recombination energy of electrons and holes and a substance which can react with the photosensitized oxidation reduction agent.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mikio Yukawa
  • Patent number: 8841027
    Abstract: A power storage device with favorable battery characteristics and a manufacturing method thereof are provided. The power storage device includes at least a positive electrode and a negative electrode provided so as to face the positive electrode with an electrolyte provided therebetween. The positive electrode includes a collector and a film containing an active material over the collector. The film containing the active material contains LieFefPgOh satisfying relations 3.5?h/g?4.5, 0.6?g/f?1.1, and 0?e/f?1.3 and LiaFebPcOd satisfying relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8. The film containing the active material contains the LiaFebPcOd satisfying the relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8 in a region which is in contact with the electrolyte.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: September 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tamae Moriwaka
  • Patent number: 8795895
    Abstract: A power storage device with favorable battery characteristics and a manufacturing method thereof are provided. The power storage device includes at least a positive electrode and a negative electrode provided so as to face the positive electrode with an electrolyte provided therebetween. The positive electrode includes a collector and a film containing an active material over the collector. The film containing the active material contains LieFefPgOh satisfying relations 3.5?h/g?4.5, 0.6?g/f?1.1, and 0?e/f?1.3 and LiaFebPcOd satisfying relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8. The film containing the active material contains the LiaFebPcOd satisfying the relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8 in a region which is in contact with the electrolyte.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: August 5, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tamae Moriwaka
  • Patent number: 8664035
    Abstract: An object is to reduce variations in programming behavior from memory element to memory element. Furthermore, an object is to obtain a semiconductor device with excellent writing characteristics and in which the memory element is mounted. The memory element includes a first conductive layer, a metal oxide layer, a semiconductor layer, an organic compound layer, and a second conductive layer, where the metal oxide layer, the semiconductor layer, and the organic compound layer are interposed between the first conductive layer and the second conductive layer; the metal oxide layer is provided in contact with the first conductive layer; and the semiconductor layer is provided in contact with the metal oxide layer. By use of this kind of structure, variations in programming behavior from memory element to memory element are reduced.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: March 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nozomu Sugisawa
  • Publication number: 20130337320
    Abstract: To provide a method for forming a storage battery electrode including an active material layer with high density in which the proportion of conductive additive is low and the proportion of the active material is high. To provide a storage battery having a higher capacity per unit volume of an electrode with the use of a storage battery electrode formed by the formation method. A method for forming a storage battery electrode includes the steps of forming a mixture including an active material, graphene oxide, and a binder; providing a mixture over a current collector; and immersing the mixture provided over the current collector in a polar solvent containing a reducer, so that the graphene oxide is reduced.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 19, 2013
    Inventor: Mikio YUKAWA
  • Patent number: 8604547
    Abstract: It is an object of the present invention to provide a nonvolatile memory device, in which additional writing is possible other than in manufacturing and forgery and the like due to rewriting can be prevented, and a semiconductor device having the memory device. It is another object of the present invention to provide an inexpensive and nonvolatile memory device with high reliability and a semiconductor device. According to one feature of the present invention, a memory device includes a first conductive layer formed over an insulating surface, a second conductive layer, a first insulating layer interposed between the first conductive layer and the second conductive layer, and a second insulating layer which covers a part of the first conductive layer, wherein the first insulating layer covers an edge portion of the first conductive layer, the insulating surface, and the second insulating layer.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: December 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tamae Takano, Yoshinobu Asami, Shunpei Yamazaki, Takehisa Sato
  • Publication number: 20130266869
    Abstract: The formation method of graphene includes the steps of forming a layer including graphene oxide over a first conductive layer; and supplying a potential at which the reduction reaction of the graphene oxide occurs to the first conductive layer in an electrolyte where the first conductive layer as a working electrode and a second conductive layer with a as a counter electrode are immersed. A manufacturing method of a power storage device including at least a positive electrode, a negative electrode, an electrolyte, and a separator includes a step of forming graphene for an active material layer of one of or both the positive electrode and the negative electrode by the formation method.
    Type: Application
    Filed: September 28, 2012
    Publication date: October 10, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiroatsu TODORIKI, Yumiko SAITO, Takahiro KAWAKAMI, Kuniharu NOMOTO, Mikio YUKAWA
  • Patent number: 8494021
    Abstract: To provide a small and lightweight organic laser device which can be manufactured in a reproductive manner and from which laser light with a desired wavelength can be obtained. A first substrate provided with a light-emitting element having a light-emitting layer between a pair of electrodes and a second substrate provided with a laser medium including a laser dye face each other and one of the pair of electrodes, which is placed between the light-emitting layer and the laser medium, has a light transmitting property. With such a structure, a laser device with which a laser medium and a light source are integrated can be provided.
    Type: Grant
    Filed: August 20, 2009
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tetsuo Tsutsui
  • Patent number: 8421061
    Abstract: It is an object of the present invention to reduce variations in behavior of each memory element. In addition, it is another object of the present invention to obtain a semiconductor device, on which the memory element is mounted, which is superior in terms of performance and reliability. A memory element of the present invention includes in its structure a first conductive layer; a semiconductor layer; an organic compound layer; and a second conductive layer, where the semiconductor layer and the organic compound layer are interposed between the first conductive layer and the second conductive layer, and the semiconductor layer is formed to be in contact with the first conductive layer and/or the second conductive layer. With such a structure, variations in behavior of each memory element are reduced.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nozomu Sugisawa
  • Patent number: 8399881
    Abstract: On object of the invention is to provide a nonvolatile memory device, in which data can be added to the memory device after a manufacturing process and forgery and the like by rewriting can be prevented, and a semiconductor device including the memory device. Another object of the invention is to provide a highly-reliable, inexpensive, and nonvolatile memory device and a semiconductor device including the memory device. A memory element includes a first conductive layer, a second conductive layer, a first insulating layer with a thickness of 0.1 nm or more and 4 nm or less being in contact with the first conductive layer, and an organic compound layer interposed between the first conductive layer, the first insulating layer, and the second conductive layer.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: March 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nobuharu Ohsawa, Yoshinobu Asami
  • Publication number: 20130059195
    Abstract: To provide an electrode for a power storage device, which has high reliability and can be miniaturized. To provide a power storage device including the electrode. In the electrode, a stress-relieving layer which relieves internal stress of an active material layer including a whisker is provided over a current collector. By the stress-relieving layer, deformation of the current collector can be suppressed and the productivity of the power storage device can be increased. In addition, the size of the power storage device can be reduced and the reliability thereof can be increased. Graphene may be formed so as to cover the active material layer including a whisker.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 7, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazutaka Kuriki, Mikio Yukawa, Nobuhiro Inoue
  • Publication number: 20130045156
    Abstract: A first precipitate is formed by mixing graphite and an oxidizer containing an alkali metal salt in a solution. Next, a second precipitate is formed by ionizing the oxidizer which is included in the first precipitate, with an acid solution, and removing the oxidizer from the first precipitate. Then, a dispersion liquid in which graphene oxide is dispersed is prepared by mixing the second precipitate and water to form a mixed solution and then applying ultrasonic waves to the mixed solution or mechanically stirring the mixed solution, so that the graphene oxide is separated from graphite oxide that is the graphite which is included in the second precipitate and oxidized. Next, graphene oxide salt is formed by mixing the dispersion liquid, a basic solution, and an organic solvent and reacting the graphene oxide included in the dispersion liquid and a base included in the basic solution to each other.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 21, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kuniharu Nomoto, Nobuhiro Inoue, Mikio Yukawa, Tatsuya Ikenuma
  • Patent number: 8315288
    Abstract: To reduce the laser threshold by efficiently exciting a light-emitting body in a solid-state dye laser with light having high density, thereby facilitating emission of laser beams, and to miniaturize a solid-state dye laser including an excitation light source. A solid-state dye laser capable of emitting laser beams by efficiently introducing light from an excitation light source to a light-emitting body incorporated in an optical resonator structure and exciting the light-emitting body with light with high density, is realized.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tetsuo Tsutsui
  • Patent number: 8295104
    Abstract: It is an object of the present invention to provide a volatile organic memory in which data can be written other than during manufacturing and falsification by rewriting can be prevented, and to provide a semiconductor device including such an organic memory. It is a feature of the invention that a semiconductor device includes a plurality of bit lines extending in a first direction; a plurality of word lines extending in a second direction different from the first direction; a memory cell array including a plurality of memory cells each provided at one of intersections of the bit lines and the word lines; and memory elements provided in the memory cells, wherein the memory elements include bit lines, an organic compound layer, and the word lines, and the organic compound layer includes a layer in which an inorganic compound and an organic compound are mixed.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: October 23, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Abe, Mikio Yukawa, Tamae Takano, Yoshinobu Asami, Kiyoshi Kato, Ryoji Nomura, Yoshitaka Moriya