Patents by Inventor Mikio Yukawa

Mikio Yukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8288197
    Abstract: It is an object of the present invention to provide a technique in which a high-performance and highly reliable semiconductor device can be manufactured at low cost with high yield. A memory device according to the present invention has a first conductive layer including a plurality of insulators, an organic compound layer over the first conductive layer including the insulators, and a second conductive layer over the organic compound layer.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: October 16, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nobuharu Ohsawa, Yoshinobu Asami, Ikuko Kawamata, Shunpei Yamazaki
  • Patent number: 8283679
    Abstract: The present invention provides a semiconductor device having an integrated circuit formed by a low cost glass substrate, which can respond to the increase of an amount of information, and which offers high performance at high speed.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: October 9, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ryoji Nomura, Hiroko Abe, Mikio Yukawa, Yasuyuki Arai
  • Patent number: 8227802
    Abstract: It is an object of the present invention to provide a semiconductor device in which data can be written except when manufacturing the semiconductor device and that counterfeits can be prevented. Moreover, it is another object of the invention to provide an inexpensive semiconductor device including a memory having a simple structure. The semiconductor device includes a field effect transistor formed over a single crystal semiconductor substrate, a first conductive layer formed over the field effect transistor, an organic compound layer formed over the first conductive layer, and a second conductive layer formed over the organic compound layer, and a memory element includes the first conductive layer, the organic compound, and the second conductive layer. According to the above structure, a semiconductor device which can conduct non-contact transmission/reception of data can be provided by possessing an antenna.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: July 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Abe, Yuji Iwaki, Mikio Yukawa, Shunpei Yamazaki, Yasuyuki Arai, Yasuko Watanabe, Yoshitaka Moriya
  • Publication number: 20120108029
    Abstract: It is an object of the present invention to provide a technique in which a high-performance and high reliable memory device and a semiconductor device provided with the memory device are manufactured at low cost with high yield. The semiconductor device includes an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator. Further, the semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound over the first conductive layer to form an organic compound layer including an insulator, and forming a second conductive layer over the organic compound layer including an insulator.
    Type: Application
    Filed: November 14, 2011
    Publication date: May 3, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mikio YUKAWA, Nobuharu OHSAWA, Ryoji NOMURA, Yoshinobu ASAMI
  • Patent number: 8101943
    Abstract: It is an object of the present invention to provide a technique in which a high-performance and high reliable memory device and a semi-conductor device provided with the memory device are manufactured at low cost with high yield. The semiconductor device includes an organic compound layer including an insulator over a first conductive layer and a second conductive layer over the organic compound layer including an insulator. Further, the semiconductor device is manufactured by forming a first conductive layer, discharging a composition of an insulator and an organic compound over the first conductive layer to form an organic compound layer including an insulator, and forming a second conductive layer over the organic compound layer including an insulator.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: January 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nobuharu Ohsawa, Ryoji Nomura, Yoshinobu Asami
  • Patent number: 8088654
    Abstract: To provide a semiconductor device which is higher functional and reliable and a technique capable of manufacturing the semiconductor device with a high yield at low cost without complexing the apparatus or process. At least one of a first conductive layer and a second conductive layer is formed containing one kind or plural kinds of indium, tin, lead, bismuth, calcium, manganese, or zinc; or oxidation treatment is performed at least one of interfaces between an organic compound layer and the first conductive layer and between the organic compound layer and the second conductive layer. The first conductive layer, the organic compound layer, and the second conductive layer which are formed over a first substrate with a peeling layer interposed therebetween can be peeled from the first substrate with the peeling layer, and transposed to a second substrate.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: January 3, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Nobuharu Ohsawa, Mikio Yukawa, Yoshitaka Dozen
  • Publication number: 20110300445
    Abstract: A power storage device which can have an improved performance such as higher discharge capacity and in which deterioration due to peeling of an active material layer or the like is difficult to occur, and a method for manufacturing the power storage device are provided. The power storage device includes a current collector, a mixed layer formed over the current collector, and a crystalline silicon layer which is formed over the mixed layer and functions as an active material layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions projecting over the crystalline silicon region. The whisker-like crystalline silicon region includes a protrusion having a bending or branching portion.
    Type: Application
    Filed: May 19, 2011
    Publication date: December 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi MURAKAMI, Kazutaka KURIKI, Mikio YUKAWA
  • Publication number: 20110294010
    Abstract: It is an object to perform insertion and extraction of lithium ions effectively at a positive electrode of a power storage device so as to increase the reaction speed. Further, it is an object to increase the capacitance per unit volume of an active material of a positive electrode. A layer containing carbon and an active material layer are stacked at a positive electrode, whereby insertion and extraction of lithium ions are effectively performed at the positive electrode and reaction speed can be increased, even when the thickness of the positive electrode is increased. The active material layer interposed between the layers each containing carbon includes particulate crystals and therefore has high density, so that the active material can have large capacitance per unit volume.
    Type: Application
    Filed: May 23, 2011
    Publication date: December 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Mikio YUKAWA
  • Publication number: 20110294011
    Abstract: An energy storage device is provided in which a discharge capacity can be high and/or in which degradation of an electrode due to repetitive charge and discharge can be reduced. An electrode of the energy storage device which includes a crystalline silicon layer serving as an active material layer is provided. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region having a plurality of protrusions projected upward from the crystalline silicon region. The protrusions include a first protrusion and a second protrusion; the second protrusion has a larger length along the axis and a sharper tip than the first protrusion.
    Type: Application
    Filed: May 17, 2011
    Publication date: December 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazutaka KURIKI, Mikio YUKAWA
  • Publication number: 20110294005
    Abstract: An object is to improve characteristics of a power storage device by devising the shape of an active material layer. The characteristics of the power storage device can be improved by providing a power storage device including a first electrode, a second electrode, and an electrolyte provided between the first electrode and the second electrode. The second electrode includes an active material layer. The active material layer includes a plurality of projecting portions containing an active material and a plurality of particles containing an active material, which are arranged over the plurality of projecting portions or in a space between the plurality of projecting portions.
    Type: Application
    Filed: May 6, 2011
    Publication date: December 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazutaka KURIKI, Mikio YUKAWA, Hideki MATSUKURA
  • Publication number: 20110266654
    Abstract: Provided is a method for manufacturing a power storage device in which a crystalline silicon layer including a whisker-like crystalline silicon region is formed as an active material layer over a current collector by a low-pressure CVD method in which heating is performed using a deposition gas containing silicon. The power storage device includes the current collector, a mixed layer formed over the current collector, and the crystalline silicon layer functioning as the active material layer formed over the mixed layer. The crystalline silicon layer includes a crystalline silicon region and a whisker-like crystalline silicon region including a plurality of protrusions which project over the crystalline silicon region. With the protrusions, the surface area of the crystalline silicon layer functioning as the active material layer can be increased.
    Type: Application
    Filed: April 18, 2011
    Publication date: November 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazutaka KURIKI, Mikio YUKAWA, Yuji ASANO
  • Publication number: 20110236757
    Abstract: A power storage device with favorable battery characteristics and a manufacturing method thereof are provided. The power storage device includes at least a positive electrode and a negative electrode provided so as to face the positive electrode with an electrolyte provided therebetween. The positive electrode includes a collector and a film containing an active material over the collector. The film containing the active material contains LieFejPgOh satisfying relations 3.5?h/g?4.5, 0.6?g/f?1.1, and 0?e/f?1.3 and LiaFebPcOd satisfying relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8. The film containing the active material contains the LiaFebPcOd satisfying the relations 3.5?d/c?4.5, 0.6?c/b?1.8, and 0.7?a/b?2.8 in a region which is in contact with the electrolyte.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mikio YUKAWA, Tamae MORIWAKA
  • Publication number: 20110236736
    Abstract: An object is to provide an energy storage device capable of supplying stable voltage and easily detecting remaining capacity and charging capacity. The energy storage device includes a positive electrode, a negative electrode formed so as to face the positive electrode, and an electrolyte interposed between the positive electrode and the negative electrode, in which a discharging curve or a charging curve of the positive electrode has plateaus (also referred to as flat portions of the potential). Specifically, the discharging curve or the charging curve of the positive electrode has a plurality of plateaus, and positive electrode potential can be monitored in plural steps, whereby the remaining capacity and the charging capacity can be easily detected.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Mikio YUKAWA
  • Patent number: 8023302
    Abstract: It is an object of the present invention to provide an involatile memory device, in which additional writing of data is possible other than in manufacturing steps and forgery and the like due to rewriting can be prevented, and a semiconductor device having the memory device. It is also an object of the present invention to provide an inexpensive involatile memory device and a semiconductor device having high reliability. According to the present invention, a memory device includes a first conductive layer, a second conductive layer, and an insulating layer interposed between the first conductive layer and the second conductive layer, where the first conductive layer has a convex portion.
    Type: Grant
    Filed: January 26, 2006
    Date of Patent: September 20, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Hiroko Abe, Shunpei Yamazaki
  • Publication number: 20110212363
    Abstract: The present invention relates to a power storage system including a negative electrode which has a crystalline silicon film provided as a negative electrode active material on the surface of a current collector and contains a conductive oxide in a surface layer section of the crystalline silicon film. Alternatively, the present invention relates to a method for manufacturing a power storage system, which includes the step of forming an amorphous silicon film on a current collector, adding a catalytic element for promoting crystallization of the amorphous silicon, onto a surface of the amorphous silicon film, heating the amorphous silicon film with the catalytic element added to crystallize the amorphous silicon film and thereby form a crystalline silicon film, and using the crystalline silicon film as a negative electrode active material layer.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Tamae MORIWAKA, Kazutaka KURIKI, Mikio YUKAWA
  • Publication number: 20110210412
    Abstract: On object of the invention is to provide a nonvolatile memory device, in which data can be added to the memory device after a manufacturing process and forgery and the like by rewriting can be prevented, and a semiconductor device including the memory device. Another object of the invention is to provide a highly-reliable, inexpensive, and nonvolatile memory device and a semiconductor device including the memory device. A memory element includes a first conductive layer, a second conductive layer, a first insulating layer with a thickness of 0.1 nm or more and 4 nm or less being in contact with the first conductive layer, and an organic compound layer interposed between the first conductive layer, the first insulating layer, and the second conductive layer.
    Type: Application
    Filed: May 9, 2011
    Publication date: September 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mikio YUKAWA, Nobuharu OHSAWA, Yoshinobu ASAMI
  • Publication number: 20110186802
    Abstract: The present invention provides a memory device and a semiconductor device which have high reliability for writing at low cost. Furthermore, the present invention provides a memory device and a semiconductor device having a non-volatile memory element in which data can be additionally written and which can prevent forgery due to rewriting and the like. The memory element includes a first conductive layer, a second conductive layer, and an organic compound layer, which is formed between the first conductive layer and the second conductive layer, and which has a photosensitized oxidation reduction agent which can be an excited state by recombination energy of electrons and holes and a substance which can react with the photosensitized oxidation reduction agent.
    Type: Application
    Filed: April 13, 2011
    Publication date: August 4, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Mikio YUKAWA
  • Patent number: 7977669
    Abstract: It is an object of the present invention to provide a high-performance and high reliable semiconductor device and to provide a technique of manufacturing the semiconductor device at low cost with high yield. The semiconductor device is manufactured by steps of forming a first conductive layer, forming a first liquid-repellent layer over the first conductive layer, discharging a composition containing a material for a mask layer over the first liquid-repellent layer to form a mask layer, processing the first liquid-repellent layer with the use of the mask layer, forming a second liquid-repellent layer, forming an insulating layer over the first conductive layer and the second conductive layer, and forming a second conductive layer over the insulating layer.
    Type: Grant
    Filed: February 7, 2006
    Date of Patent: July 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Gen Fujii, Hironobu Shoji
  • Patent number: 7956352
    Abstract: On object of the invention is to provide a non-volatile memory device, in which data can be added to the memory device after a manufacturing process and forgery and the like by rewriting can be prevented, and a semiconductor device including the memory device. Another object of the invention is to provide a highly-reliable, inexpensive, and nonvolatile memory device and a semiconductor device including the memory device. A memory element includes a first conductive layer, a second conductive layer, a first insulating layer with a thickness of 0.1 nm or more and 4 nm or less being in contact with the first conductive layer, and an organic compound layer interposed between the first conductive layer, the first insulating layer, and the second conductive layer.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: June 7, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Nobuharu Ohsawa, Yoshinobu Asami
  • Patent number: 7935957
    Abstract: The present invention provides a memory device and a semiconductor device which have high reliability for writing at low cost. Furthermore, the present invention provides a memory device and a semiconductor device having a non-volatile memory element in which data can be additionally written and which can prevent forgery due to rewriting and the like. The memory element includes a first conductive layer, a second conductive layer, and an organic compound layer, which is formed between the first conductive layer and the second conductive layer, and which has a photosensitized oxidation reduction agent which can be an excited state by recombination energy of electrons and holes and a substance which can react with the photosensitized oxidation reduction agent.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: May 3, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mikio Yukawa