Patents by Inventor Min Cheng

Min Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923231
    Abstract: A substrate table is provided. The substrate table includes a main body having a surface and a plurality of burls extending from the surface. The burls are configured to support a substrate on the main body. The substrate table further includes a number of vacuum channels provided in the burls to apply a vacuum to the substrate. The vacuum channels are distributed throughout the main body and arranged in a grid pattern.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Cheng Wu, Chi-Hung Liao
  • Publication number: 20240072133
    Abstract: Backside and frontside contact structures wrapping around source/drain regions provide increased contact areas for electrical connections and allow increased silicide areas. Sidewall metallization of epitaxially grown source/drain regions provides source/drain sidewall contacts that enable wrap-around contact formation on both the front side and the back side of a semiconductor device layer. Front side and back side contact metallization over the source/drain sidewall contacts allows wrap-around contact structures on both sides of the device layer.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Ruilong Xie, Chanro Park, Min Gyu Sung, Kangguo Cheng, Julien Frougier
  • Publication number: 20240072134
    Abstract: Backside self-aligned contact designs using a replacement contact process with unique placeholder profile are provided. In one aspect, a semiconductor device includes: a field-effect transistor(s) on a frontside of the device; backside power rails on a backside of the device; a backside source/drain region contact connecting a given one of the backside power rails to a source/drain region of the field-effect transistor(s), and a dielectric placeholder(s) between the given backside power rail and another source/drain region of the field-effect transistor(s), where a first end of the dielectric placeholder(s) having a width W1 directly contacts the given backside power rail, a second end of the dielectric placeholder(s) having a width W2 directly contacts the other source/drain region, where W1>W2. The field-effect transistor(s) can include a stack of active layers with bottom dielectric isolation, and a gate-all-around configuration.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Ruilong Xie, Kangguo Cheng, Julien Frougier, Chanro Park, Min Gyu Sung
  • Publication number: 20240071939
    Abstract: A semiconductor structure includes a composite redistribution structure, a first interconnect device and an integrated circuit (IC) package component. The composite redistribution structure includes a first redistribution structure, a second redistribution structure and a third redistribution structure. The second redistribution structure is located between the first redistribution structure and the third redistribution structure. The first interconnect device is embedded in the second redistribution structure. The first interconnect device includes a plurality of metal connectors leveled with a surface of the second redistribution structure and electrically connected to the third redistribution structure. The IC package component is disposed over the third redistribution structure and electrically connected to the first interconnect device via the third redistribution structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Wei Cheng, Tsung-Ding Wang, Yu-Min Liang, Hao-Cheng Hou
  • Patent number: 11913079
    Abstract: Described herein are methods and kits for detecting the presence or absence of gene dysregulations such as those arising from gene fusions and/or chromosomal abnormalities, e.g. translocations, insertions, inversions and deletions. The methods, compositions and kits are useful for detecting mutations that cause the differential expression of a 5? portion of a target gene relative to the 3? region of the target gene. The average expression of the 5? portion of the target gene is compared with the average expression of the 3? portion of the target gene to determine an intragenic differential expression (IDE). The IDE can then be used to determine if a dysregulation or a particular disease (or susceptibility to a disease) is present or absent in a subject or sample.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: February 27, 2024
    Assignee: Quest Diagnostics Investments LLC
    Inventor: Shih-Min Cheng
  • Publication number: 20240059819
    Abstract: Polar silane linkers are provided that attach to resins to form silane-functionalized resins. The functionalized resins can be bound to hydroxyl groups on the surface of silica particles to improve the dispersibility of the silica particles in rubber mixtures. Further disclosed are synthetic routes to provide the silane-functionalized resins, as well as various uses and end products that benefit from the unexpected properties of the silane-functionalized resins. Silane-functionalized resins impart remarkable properties on various rubber compositions, such as tires, belts, hoses, brakes, and the like. Automobile tires incorporating the silane-functionalized resins are shown to possess excellent results in balancing the properties of rolling resistance, tire wear, and wet braking performance.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 22, 2024
    Inventors: Emily Baird Anderson, John Dayton Baker, JR., Terri Roxanne Carvagno, Judicael Jacques Chapelet, Wei-Min Cheng, Liu Deng, Jacobus Gillis De Hullu, Sebastian Finger, Hubert Hirschlag, Wentao Li, Mutombo Joseph Muvundamina, Fabian Peters, Carla Recker
  • Patent number: 11901791
    Abstract: A functional module is provided. The functional module is applied to an electronic device, and includes a housing, a functional member, and a motor assembly. Both the functional member and the motor assembly are disposed in the housing. The motor assembly includes a motor and an output shaft. The motor is configured to drive the output shaft to rotate. The output shaft protrudes from one side of the housing.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: February 13, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chia-Min Cheng, Chui-Hung Chen, Ching-Yuan Yang, Cheng-Han Chung
  • Patent number: 11899378
    Abstract: A lithography system includes a collector having a mirror surface, a laser generator aiming at an excitation zone in front of the mirror surface of the collector, a droplet generator, and a droplet deflector operative to apply a force at a position between the droplet generator and the excitation zone.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Min-Cheng Wu
  • Publication number: 20240047485
    Abstract: A CMOS image sensor with 3D monolithic OSFET and FEMIM capacitor, including a substrate with CMOS devices formed thereon, a BEOL interconnect layer on the substrate and with BEOL interconnects formed therein, a pixel circuit layer on the BEOL interconnect layer. The OSFETs and FEMIM capacitors are formed in the pixel circuit layer, and a photoelectric conversion layer on the pixel circuit layer and with photodiodes are formed therein, wherein the CMOS devices, the OSFETs, FEMIM capacitors and photodiodes are electrically connected with each other through the BEOL interconnects.
    Type: Application
    Filed: April 12, 2023
    Publication date: February 8, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Shang-Shiun Chuang
  • Patent number: 11884881
    Abstract: The disclosure is directed to methods and compositions delaying the gelation of polymers in water flooding by sequentially or co-injecting a carboxylate-containing polymer solution, a gel-delaying polymer, and gelation agent into a hydrocarbon reservoir. Delays of weeks are observed.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: January 30, 2024
    Assignees: CONOCOPHILLIPS COMPANY, UNIVERSITY OF KANSAS
    Inventors: Huili Guan, Cory Berkland, Ahmad Moradi-Araghi, Jenn-Tai Liang, Terry M. Christian, Riley B. Needham, Min Cheng
  • Patent number: 11877433
    Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: January 16, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Pin-Hong Chen, Tsun-Min Cheng, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Yi-Wei Chen, Hsin-Fu Huang, Chi-Mao Hsu, Li-Wei Feng, Ying-Chiao Wang, Chung-Yen Feng
  • Publication number: 20230422475
    Abstract: The present disclosure provides a semiconductor memory device and a method of fabricating the same, with the semiconductor memory device including a substrate, a plurality of capacitor structures, a stress insulating layer, and at least one interface layer. The capacitor structures are separately disposed on the substrate, and each of the capacitor structures includes a plurality of capacitors. The stress insulating layer is disposed on the substrate to cover the capacitor structures. The interface layer is disposed within the stress insulating layer, between any two adjacent ones of the capacitor structures, wherein a tip portion of the at least one interface layer is higher than a top surface of each of the capacitor structures. In this way, the stress mode of the substrate may be adjusted through disposing the interface layer, so as to achieve the effect of eliminating redundant stress, and to improve the structural reliability of the device.
    Type: Application
    Filed: August 4, 2022
    Publication date: December 28, 2023
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Liandie Zhuang, Ronghui Lin, Ling Li, Wen-Yi Teng, Tsun-Min Cheng
  • Patent number: 11852980
    Abstract: Some implementations described herein provide an exposure tool. The exposure tool includes a reticle deformation detector and one or more processors configured to obtain, via the reticle deformation detector, reticle deformation information associated with a reticle during a scanning process for scanning multiple fields of a wafer. The one or more processors determine, based on the reticle deformation information, a deformation of the reticle at multiple times during the scanning process, and perform, based on the deformation of the reticle at the multiple times, one or more adjustments of one or more components of the exposure tool during the scanning process.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Cheng Wu, Ching-Ju Huang
  • Patent number: 11844633
    Abstract: A feature identifying method and an electronic device are provided. The method includes: obtaining a plurality of physiological information obtained by measuring a subject at a plurality of time points in one day; converting the plurality of physiological information into a plurality of correlation features respectively; establishing a plurality of first risk prediction models according to the plurality of correlation features, and identifying at least one first correlation feature from the plurality of correlation features according to the plurality of first risk prediction models; establishing a plurality of second risk prediction models according to the at least one first correlation feature, and identifying, according to the plurality of second risk prediction models, at least one second correlation feature capable of predicting a specific disease from the at least one first correlation feature; and outputting the at least one second correlation feature.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 19, 2023
    Assignees: Acer Incorporated, National Yang-Ming University
    Inventors: Chun-Hsien Li, Tsung-Hsien Tsai, Liang-Kung Chen, Chen-Huan Chen, Hao-Min Cheng
  • Publication number: 20230400759
    Abstract: A photomask design correction method is provided. The photomask design correction method includes the following steps. A layer information data is provided. An OPC process is performed on the layer information data to obtain a first photomask data. A photomask is fabricated based on the first photomask data. A pattern information data of the photomask is obtained after the photomask is fabricated. The difference between the pattern information data and a database of the OPC process is analyzed. An OPC model of the OPC process is corrected based on the difference to obtain a corrected OPC model. The OPC process is performed using the corrected OPC model on the layer information data to obtain a second photomask data.
    Type: Application
    Filed: June 9, 2022
    Publication date: December 14, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Min Cheng Yang, Wei Cyuan Lo, Yung-Feng Cheng
  • Patent number: 11830589
    Abstract: The disclosure provides a disease classification method and a disease classification device. The disease classification method includes: inputting samples into a first stage model and obtaining a first stage determination result; inputting first samples determined positive by the first stage model into a second stage high specificity model to obtain second samples determined to be positive and third samples determined to be negative and rule in the second samples; inputting fourth samples determined negative by the first stage model into a second stage high sensitivity model to obtain fifth samples determined to be positive and sixth samples determined to be negative and rule out the sixth samples; obtaining a second stage determination result of the second and sixth samples; and inputting the third and fifth samples not ruled in or ruled out into a third stage model and obtaining a third stage determination result of the third and fifth samples.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: November 28, 2023
    Assignees: Acer Incorporated, Acer Medical Inc., Taipei Veterans General Hospital
    Inventors: Jun-Hong Chen, Tsung-Hsien Tsai, Chun-Hsien Li, Wei-Ting Wang, Yin-Hao Lee, Hao-Min Cheng
  • Patent number: 11820843
    Abstract: Polar silane linkers are provided that attach to resins to form silane-functionalized resins. The functionalized resins can be bound to hydroxyl groups on the surface of silica particles to improve the dispersibility of the silica particles in rubber mixtures. Further disclosed are synthetic routes to provide the silane-functionalized resins, as well as various uses and end products that benefit from the unexpected properties of the silane-functionalized resins. Silane-functionalized resins impart remarkable properties on various rubber compositions, such as tires, belts, hoses, brakes, and the like. Automobile tires incorporating the silane-functionalized resins are shown to possess excellent results in balancing the properties of rolling resistance, tire wear, and wet braking performance.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: November 21, 2023
    Assignee: Synthomer Adhesive Technologies LLC
    Inventors: Emily Baird Anderson, John Dayton Baker, Jr., Terri Roxanne Carvagno, Judicael Jacques Chapelet, Wei-Min Cheng, Liu Deng, Jacobus Gillis De Hullu, Sebastian Finger, Hubert Hirschlag, Wentao Li, Mutombo Joseph Muvundamina, Fabian Peters, Carla Recker
  • Patent number: 11820939
    Abstract: The instant application relates to nanogels or compositions that hold multivalent metal ions until some level of nanogel degradation has occurred, then slowly release the multivalent metal ions for gelation with carboxylate containing polymers. Compositions comprising such nanogels, together with polymers that can be crosslinked with multivalent metal ions, allow the deployment of such mixtures in various applications, and greatly increased gelation times.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: November 21, 2023
    Assignees: CONOCOPHILLIPS COMPANY, UNIVERSITY OF KANSAS
    Inventors: Huili Guan, Cory Berkland, Ahmad Moradi-Araghi, Jenn-Tai Liang, Terry M. Christian, Riley B. Needham, Min Cheng, Faye Lynn Scully, James H. Hedges
  • Patent number: 11825006
    Abstract: The invention discloses an electronic device. The electronic device comprises a body and a function module. The function module is rotatably disposed in the body, and includes a housing, a function component and a rigid-flex circuit board. The housing includes a shaft portion. The shaft portion is engaged to the body. The function component and the rigid-flex circuit board are disposed in the housing. The rigid-flex circuit board includes a rigid board portion and at least a flexible board portion. The rigid board portion is electrically connected to the function component. The flexible board portion is connected to the rigid board portion. The flexible board portion passes through the shaft portion and extends into the body.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: November 21, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chia-Min Cheng, Chui-Hung Chen, Ching-Yuan Yang, Cheng-Han Chung
  • Patent number: D1016698
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: March 5, 2024
    Assignee: Foxtron Vehicle Technologies Co., Ltd.
    Inventors: Tse-Min Cheng, Ming-Chang Lin, Yuan-Jie He, Chiao-Chi Lin, Lu-Han Lee