Patents by Inventor Min Cheng

Min Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230367869
    Abstract: Embodiments of the present disclosure relate to a method, system and computer program product for providing system services. In some embodiments, a method is disclosed. According to the method, from a user program in a user address space, a request for a system service is received via a program call instruction of a set of program call instructions in an application interface code library. Based on the program call instruction, a target authorized address space of a plurality of authorized address spaces and a target system service routine for providing the system service in the target authorized address space is determined. A result of running the target system service routine in the target authorized address space is returned to the user program as a response to the request.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 16, 2023
    Inventors: NAIJIE LI, Min Cheng, Kui Zhang, Yi Chai, Guang Han Sui
  • Patent number: 11814578
    Abstract: The invention is directed to delayed gelation agents comprising a degradable polymeric cage containing therein one or more gelation agents. The cage degrades in situ, e.g, in an oil reservoir, thus releasing the gelation agent(s), which can then crosslink second polymers in situ to form a gel.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: November 14, 2023
    Assignees: CONOCOPHILLIPS COMPANY, UNIVERSITY OF KANSAS
    Inventors: Huili Guan, Cory Berkland, Ahmad Moradi-Araghi, Jenn-Tai Liang, David R. Zornes, Riley B Needham, James H. Hedges, Min Cheng, James P. Johnson, Faye L. Scully
  • Publication number: 20230356390
    Abstract: The embodiments of the present disclosure provide a terminal force soft-sensing method of a hydraulic manipulator.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 9, 2023
    Applicants: EAST CHINA JIAOTONG UNIVERSITY, CHONGQING UNIVERSITY
    Inventors: Ruqi DING, Feng LI, Min CHENG, Gang LI, Xueshan MU, Guoliang HU
  • Publication number: 20230360579
    Abstract: The present disclosure relates to the field of display technologies and, in particular to a display panel and an electronic device. The display panel comprises: Q rows of first scanning line groups arranged sequentially along a column direction; M columns of second scanning line groups arranged sequentially along a row direction; and at least one gate drive circuit, located on a side of the Q-th row of the first scanning line groups away from the (Q?1)-th row of the first scanning line groups. Each gate drive circuit comprises Q columns of shift register unit groups cascaded in stages. The q-th stage of the shift register unit groups is connected with the q-th row of the first scanning line groups through at least one column of the second scanning line groups. M?Q>1, 1?q?Q, and M, N, Q, q are all positive integers.
    Type: Application
    Filed: December 4, 2020
    Publication date: November 9, 2023
    Inventors: Maoxiu ZHOU, Min CHENG, Yuntian ZHANG, Ke DAI, Haipeng YANG, Xiaoting JIANG, Chunxu ZHANG, Li TIAN, Mengmeng LI
  • Patent number: 11801600
    Abstract: The embodiments of the present disclosure provide a terminal force soft-sensing method of a hydraulic manipulator.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: October 31, 2023
    Assignees: EAST CHINA JIAOTONG UNIVERSITY, CHONGQING UNIVERSITY
    Inventors: Ruqi Ding, Feng Li, Min Cheng, Gang Li, Xueshan Mu, Guoliang Hu
  • Patent number: 11800721
    Abstract: A ferroelectric memory structure including a first conductive line, a second conductive line, and a memory cell is provided. The second conductive line is disposed on the first conductive line. The memory cell is disposed between the first and second conductive lines. The memory cell includes a switch device and a ferroelectric capacitor structure. The switch device is disposed between the first and second conductive lines. The ferroelectric capacitor structure is disposed between the first conductive line and the switch device. The ferroelectric capacitor structure includes ferroelectric capacitors electrically connected. Each of the ferroelectric capacitors includes a first conductive layer, a second conductive layer, and a ferroelectric material layer. The second conductive layer is disposed on the first conductive layer. The ferroelectric material layer is disposed between the first conductive layer and the second conductive layer.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: October 24, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Patent number: 11799012
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a silicon layer on a substrate and then forming a metal silicon nitride layer on the silicon layer, in which the metal silicon nitride layer includes a bottom portion, a middle portion, and a top portion and a concentration of silicon in the top portion is greater than a concentration of silicon in the middle portion. Next, a conductive layer is formed on the metal silicon nitride layer and the conductive layer, the metal silicon nitride layer, and the silicon layer are patterned to form a gate structure.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: October 24, 2023
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chun-Chieh Chiu, Pin-Hong Chen, Yi-Wei Chen, Tsun-Min Cheng, Chih-Chien Liu, Tzu-Chieh Chen, Chih-Chieh Tsai, Kai-Jiun Chang, Yi-An Huang, Chia-Chen Wu, Tzu-Hao Liu
  • Publication number: 20230324824
    Abstract: An emulsion aggregation toner including a toner particle comprising at least one resin; an optional colorant; an optional wax; and a charge control agent disposed on a surface of the toner particle; the charge control agent comprising a complex formed from a metal ion donor and at least one of a ligand selected from a member of the group consisting of a polyaromatic acid comprising humic acid, a pyranone based ligand, a furanone based ligand, or a combination thereof.
    Type: Application
    Filed: March 17, 2022
    Publication date: October 12, 2023
    Inventors: Genggeng Qi, Jordan A. Frank, Elizabeth K. Priebe, Chieh-Min Cheng, Michael F. Zona
  • Patent number: 11784908
    Abstract: Methods, apparatus, computer program products for exchange data among air-gapped devices are provided. The method comprises: identifying, by a device in a cluster of devices, a plurality of accessible devices in the cluster via corresponding respective quick response (QR) codes; generating, by the device, logical routing information based on the identified plurality of accessible devices, the logical routing information comprising at least identifiers of the identified plurality of accessible devices; and transmitting, by the device, data encoded in a plurality of QR codes to a destination device in the cluster based on a shortest routing path identified in the logical routing information.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: October 10, 2023
    Assignee: International Business Machines Corporation
    Inventors: Min Cheng, Xiao Xuan Fu, Wen Qi Wq Ye, Jiang Yi Liu, Si Yu Chen
  • Patent number: 11768412
    Abstract: There is provided a display substrate, including gate lines and data lines, which define pixel units, each pixel unit includes a pixel electrode, at least some pixel units are provided with a conductive bridge line in a same layer as the pixel electrode; in the pixel unit with the conductive bridge line, a first hollow structure is on a first side of a first or second end part of the pixel electrode, an end of the conductive bridge line is in the first hollow structure, a second hollow structure is on a second side of the first end part, an absolute value of a difference between parasitic capacitances respectively formed between the pixel electrode and the data lines on two sides of the pixel electrode and closest thereto is less than or equal to a preset capacitance difference value. A display panel and a display device are further provided.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: September 26, 2023
    Assignees: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunxu Zhang, Ke Dai, Haipeng Yang, Yuntian Zhang, Xiaoting Jiang, Min Cheng
  • Publication number: 20230297400
    Abstract: Provided herein are a method, system, and computer program product for creating scripts from command line history. The method includes determining a plurality of distances among a plurality of commands from a command line history. A plurality of command sets is determined from the plurality of commands based on the plurality of distances among the plurality of commands. Each of the plurality of command sets includes at least two neighboring commands. A script is created by the one or more processors based on a first command set and a second command set of the plurality of command sets in response to a distance between the first command set and the second command set being less than a predetermined threshold.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 21, 2023
    Inventors: JIANG YI LIU, Min Cheng, Xiao Xuan Fu, Si Yu Chen, Wen Qi WQ Ye
  • Publication number: 20230296997
    Abstract: An emulsion aggregation toner including a toner particle comprising at least one resin; an optional colorant; an optional wax; and a reactive charge control agent comprising at least one positive charging compound comprising a member selected from the group consisting of an amine compound having at least 3 carbon atoms, an ammonium compound having at least 3 carbon atoms, a phosphonium compound having at least 3 carbon atoms, a boronium compound having at least 3 carbon atoms, and combinations thereof; at least one reactive anchoring compound comprising a member selected the group consisting of amino, epoxy, carboxylic, hydroxyl, silanol, cyanide, anhydride, aldehyde, ketone, vinyl, and combinations thereof; and wherein the charge control agent optionally further comprises a negative charging compound comprising a member selected from the group consisting of aromatic carboxylic acid, silanol, phenol, pyranone, furanone, and combinations thereof.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: Jordan A. Frank, Genggeng Qi, Chieh-Min Cheng, Michael F. Zona, Elizabeth K. Priebe
  • Publication number: 20230296998
    Abstract: An emulsion aggregation toner including a toner particle comprising at least one resin; an optional colorant; an optional wax; and a charge control agent disposed on a surface of the toner particle; the control agent comprising a phenyl based siloxane; and a complex formed from a metal ion donor and at least one of a ligand selected from a member of the group consisting of a polyaromatic acid comprising humic acid, a pyranone based ligand, a furanone based ligand, or a combination thereof.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: Jordan A. Frank, Genggeng Qi, Elizabeth K. Priebe, Chieh-Min Cheng, Michael F. Zona
  • Publication number: 20230284436
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, and which includes a substrate, bit lines, bit line contacts, a gate structure, a first oxidized interface layer, and a second oxidized interface layer. The bit lines are disposed on the substrate, and the bit line contacts are disposed below the bit lines. The gate structure is disposed on the substrate, wherein each bit line and the gate structure respectively include a semiconductor layer, a conductive layer, and a covering layer stacked from bottom to top. The first oxidized interface layer is disposed between each bit line contact and the semiconductor layer of each bit line. The second oxidized interface layer is disposed within the semiconductor layer of the gate structure, wherein a topmost surface of the first oxidized interface layer is higher than a topmost surface of the second oxidized interface layer.
    Type: Application
    Filed: April 21, 2022
    Publication date: September 7, 2023
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yukihiro Nagai, Lu-Yung Lin, Chia-Wei Wu, Tsun-Min Cheng, Yu Chun Lin, Zheng Guo Zhang, Sun-Hung Chen, Wu Xiang Li, Hsiao-Han Lin
  • Publication number: 20230265315
    Abstract: Two-part silane modified polymer/free radically curable adhesive systems demonstrating improved strength and percent elongation are provided.
    Type: Application
    Filed: January 3, 2023
    Publication date: August 24, 2023
    Inventors: Chih-Min Cheng, Jian Lin, Christopher J. Verosky, James M. Murray, Daniel Yi, Richard Corrao, Zachary S. Bauman, Ling Li
  • Publication number: 20230265574
    Abstract: A method for recovering metals from tungsten-containing metallic materials includes the steps of: providing a cathode and the tungsten-containing metallic material as an anode in an electrolyte solution which has a neutral, acidic or basic pH value; and subjecting the tungsten-containing metallic material to an electrolysis process under a power density that is greater than 3 W/cm2 on the anode so that a passivation layer formed on the anode during the electrolysis process is broken down to permit the tungsten-containing metallic material to be continuously dissolved and oxidized, and a tungsten-containing compound is formed in the electrolyte solution.
    Type: Application
    Filed: July 7, 2022
    Publication date: August 24, 2023
    Inventors: Chih-Huang LAI, Shao-Chi LO, Tzu-Min CHENG
  • Publication number: 20230269938
    Abstract: A semiconductor structure includes a substrate, a common source plane disposed on the substrate, a plurality of memory cells vertically disposed on the substrate and electrically connected to the common source plane, a common source line disposed on the substrate and electrically connected to the common source plane, and an isolation pillar. The common source line extends along a first direction and has a first segment and a second segment. The isolation pillar interposes the first segment and the second segment of the common source line.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 24, 2023
    Inventors: Jung-Yi GUO, Chun-Min CHENG
  • Patent number: 11721378
    Abstract: An oxide semiconductor-based FRAM is provided in the present invention, including a substrate, a word line on the substrate, a gate insulating layer on the word line, an oxide semiconductor layer on the gate insulating layer, a source and a drain respectively on the oxide semiconductor layer and spaced apart at a distance, wherein the source and the drain further connect respectively to a plate line and a bit line, a ferroelectric dielectric layer on the source, the drain and the oxide semiconductor layer, and a write electrode on the ferroelectric dielectric layer, wherein the write electrode, the ferroelectric dielectric layer, the oxide semiconductor layer, the gate insulating layer and the word line overlap each other in a direction vertical to the substrate.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: August 8, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shou-Zen Chang, Ming-Han Liao, Min-Cheng Chen, Hiroshi Yoshida
  • Patent number: D1002046
    Type: Grant
    Filed: January 10, 2023
    Date of Patent: October 17, 2023
    Inventor: Min Cheng
  • Patent number: D1003498
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: October 31, 2023
    Inventor: Min Cheng