Abstract: A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m<n) bits based on temperature information of n bits produced by the temperature sensors. The first die provides the temperature deviation information of m bits rather than the temperature information of n bits to the second die. An internal operation of the second die is controlled using the temperature deviation information output by the first die.

Abstract: Provided are a separator for an aqueous secondary battery and an electrochemical device using the same. More specifically, provided is a composite separator having a more excellent cycle life and including a coating layer which is not easily swollen in an electrolyte solution. In the composite separator for a secondary battery according to an aspect of the present invention, distortion or lifting phenomenon is suppressed even when the heat and pressure are applied without significant decrease in permeability of the separator.

Abstract: Provided are a separator for an aqueous secondary battery and an electrochemical device using the same. More specifically, provided is a composite separator having a more excellent cycle life and including a coating layer which is not easily swollen in an electrolyte solution. In the composite separator for a secondary battery according to an aspect of the present invention, distortion or lifting phenomenon is suppressed even when the heat and pressure are applied without significant decrease in permeability of the separator.

Abstract: A separator for a secondary battery includes a porous polymer sheet having a first surface, a second surface opposing the first surface, and a plurality of pores connecting the first surface to the second surface; and heat-resistant inorganic layers formed on at least one of the first surface or the second surface of the porous polymer sheet and on internal surfaces of the pores using an atomic layer deposition (ALD) process. The at least one of the first surface or the second surface and the internal surfaces of the pores have hydrophobically coated hydrophobic layers having hydrophobic functional groups on the heat-resistant inorganic layers.

Abstract: A schedule management method based on a rotation pattern is provided. The schedule management method may include setting a repetition cycle in which a working pattern is repeated, setting a working time with respect to the repetition cycle, generating and displaying a rotation pattern including a repetition pattern of a time block based on the repetition cycle and the working time, assigning at least one worker to the rotation pattern, and generating a schedule including at least one rotation pattern.

Abstract: A multi-chip package includes a first die having temperature sensors and a second die. The first die generates temperature deviation information of m (m<n) bits based on temperature information of n bits produced by the temperature sensors. The first die provides the temperature deviation information of m bits rather than the temperature information of n bits to the second die. An internal operation of the second die is controlled using the temperature deviation information output by the first die.

Abstract: A voltage generator which generates an internal voltage based on a varying voltage derived from the internal voltage includes a feedback control circuit configured to variably transmit the varying voltage responsive to a control signal to generate a feedback voltage. A voltage generation circuit is configured to generate the internal voltage based on the feedback voltage.

Abstract: A separator for a secondary cell includes a porous polymer substrate having a first surface, a second surface opposing the first surface, and a plurality of pores connecting the first surface to the second surface; and heat-resistant coating layers formed on at least one of the first surface and the second surface of the porous polymer substrate and on internal surfaces of the pores using an atomic layer deposition process (ALD). Pores having a non-coated region are present in the internal surfaces of the pores.

Abstract: Provided is a reverse osmosis membrane using a hydrophilized polyolefin-based microporous membrane. A reverse osmosis membrane according to the present invention may provide a large treatment area per unit volume by using a thin film type support, thereby improving water treatment performance.

Abstract: A method of controlling a memory device including a temperature sensor includes sensing a temperature of the memory device and extracting an extracted temperature for controlling the memory device using the sensed temperature, storing the extracted temperature in the memory device, calculating an estimated temperature at a current time point using the extracted temperature and a plurality of past extracted temperatures stored in the memory device, and controlling the memory device using the estimated temperature.

Abstract: A separator for a secondary cell includes a porous polymer substrate having a first surface, a second surface opposing the first surface, and a plurality of pores connecting the first surface to the second surface; and heat-resistant coating layers formed on at least one of the first surface and the second surface of the porous polymer substrate and on internal surfaces of the pores using an atomic layer deposition process (ALD). Pores having a non-coated region are present in the internal surfaces of the pores.

Abstract: A semiconductor memory device includes a memory cell array and a control logic. The memory cell array includes a plurality of memory blocks. The control logic groups the memory blocks, determines driving voltages to be respectively applied to the groups, and applies each of the determined driving voltages to memory blocks included in a corresponding group to control the operation of the memory cell array.

Abstract: A memory system includes a semiconductor memory device including memory cells and an internal Random Access Memory (RAM); and a controller suitable for transmitting read retry table information to the semiconductor memory device when a read operation for the memory cells fails, wherein the internal RAM stores a read retry table during operation of the memory system, and wherein the semiconductor memory device performs a read retry operation with a read retry voltage determined based on the read retry table and the read retry table information.

Abstract: A memory system includes a semiconductor memory device including memory cells and an internal Random Access Memory (RAM); and a controller suitable for transmitting read retry table information to the semiconductor memory device when a read operation for the memory cells fails, wherein the internal RAM stores a read retry table during operation of the memory system, and wherein the semiconductor memory device performs a read retry operation with a read retry voltage determined based on the read retry table and the read retry table information.

Abstract: Provided herein may be a semiconductor memory device that may include a plurality of memory blocks configured to share bit lines and a common source line, a voltage generation circuit configured to apply an erase voltage to the common source line, and operation voltages to word lines and select lines of the plurality of memory blocks during an erase operation, a read and write circuit configured to check a program and erase status of an unselected memory block of the plurality of memory blocks during the erase operation, and a control logic configured to control the voltage generation circuit so that the operation voltages applied to select lines of a selected memory block are controlled in accordance with a result of checking the program and erase status of the unselected memory block during the erase operation.

Abstract: A chatbot-based cloud management system, including: an interface for receiving a query from a client through a plurality of access channels, and delivering a response generated in response to the received query to the client; a chatbot engine for performing a response processing to the query based on a chat learning model learned in advance and a chat knowledge context, and outputting event occurrence information when a request event from the query occurs; and a processing engine for confirming failure occurrence situation of an infra where the request event has occurred and providing it to the chatbot engine by generating failure countermeasures corresponding to the failure occurrence situation based on a failure model learned in advance and a failure processing rule, when event occurrence information is received from the chatbot engine.

Abstract: A voltage generator which generates an internal voltage based on a varying voltage derived from the internal voltage includes a feedback control circuit configured to variably transmit the varying voltage responsive to a control signal to generate a feedback voltage. A voltage generation circuit is configured to generate the internal voltage based on the feedback voltage.

Abstract: A method of controlling a memory device including a temperature sensor includes sensing a temperature of the memory device and extracting an extracted temperature for controlling the memory device using the sensed temperature, storing the extracted temperature in the memory device, calculating an estimated temperature at a current time point using the extracted temperature and a plurality of past extracted temperatures stored in the memory device, and controlling the memory device using the estimated temperature.

Abstract: An injection molding apparatus is usable in an injection machine to form an injection product. The slim injection molding apparatus includes a hot runner plate attachable to one side clamping plate of the injection machine and provided with a hot runner system; an upper core disposed in the hot runner plate; a lower core attachable to an opposite side clamping plate of the injection machine to face the upper core, the lower core configured to couple with the upper core to define a cavity corresponding to the injection product when the lower core is coupled to the upper core; and an ejecting core disposed in the lower core, the ejecting core configured to push the injection product upward when the upper core is separated from the lower core.

Abstract: A semiconductor memory device may include a control logic. The control logic may be coupled to bit lines through a read and write (read/write) circuit and to word lines. The control logic is configured to determine a duration of an activation time of a strobe signal for the read/write circuit.