Abstract: A method for depth of field tracking and controlling of a pet companion robot device to interact with a pet includes the steps of: locating a target pet within a field of view of the camera; drawing a minimum target rectangle around the target pet, with sides of the minimum target rectangle parallel with the corresponding sides of the field of view of the camera; locating a center point P of the minimum target rectangle. When P is located in quadrangles I and II, adjusting the pet companion robot device to the right to make P overlap with the vertical center line of the field of view of the camera; and when P is located in quadrangles III and IV, adjusting the pet companion robot device to the left to make P overlap with the vertical center line of the field of view of the camera.

Abstract: A fixture assembly for slitting a workpiece into a serpentine body, a cutting system having a fixture assembly, and a method of forming a serpentine body. The fixture assembly includes a patterned support section that has a plurality of support slats interspaced with gaps. A holder plate has an opening configured to receive the workpiece and positioned atop the patterned support section such that intended cutting locations in the workpiece are positioned directly above the gaps in the patterned support section and the slats are positioned directly below uncut portions of the serpentine body after cutting the workpiece.

Abstract: A negative electrode plate, a battery, and a battery pack are provided. The negative electrode plate includes a negative current collector and a negative material layer disposed on a surface of the negative current collector. The negative material layer includes a hard carbon material containing primary particles and secondary particles, and the primary particles have a defect value different from that of the secondary particles. In comparison with the solution of only using one kind of hard carbon particles having the same defect value as the negative material layer, the negative electrode plate of the present disclosure includes two kinds of hard carbon particles with different defect values, which combines the excellent properties of the two kinds of hard carbon particles. Therefore the negative electrode plate has excellent properties while satisfying the requirements of a battery, such as high energy density, high first-cycle discharge efficiency, and excellent rate performance.

Abstract: A remote display synchronization technique preserves the presence of a local display device for a remotely-rendered video stream. A server and a client device cooperate to dynamically determine a target frame rate for a stream of rendered frames suitable for the current capacities of the server and the client device and networking conditions. The server generates from this target frame rate a synchronization signal that serves as timing control for the rendering process. The client device may provide feedback to instigate a change in the target frame rate, and thus a corresponding change in the synchronization signal. In this approach, the rendering frame rate and the encoding frequency may be “synchronized” in a manner consistent with the capacities of the server, the network, and the client device, resulting in generation, encoding, transmission, decoding, and presentation of a stream of frames that mitigates missed encoding of frames while providing acceptable latency.

Abstract: A memory circuit includes a memory array including a plurality of memory cells, each memory cell of the plurality of memory cells including an n-type channel layer including a metal oxide material, and a gate structure overlying and adjacent to the n-type channel layer, the gate structure including a conductive layer overlying a ferroelectric layer. The memory circuit is configured to apply a gate voltage to each memory cell of the plurality of memory cells in first and second write operations, the gate voltage has a positive polarity and a first magnitude in the first write operation and a negative polarity and a second magnitude greater than the first magnitude in the second write operation.

Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.

Abstract: A method for preparing Portland cement includes: respectively weighing iron slag, copper slag, vanadium slag, and nickel slag and grinding, to yield prefabricated iron slag, prefabricated copper slag, prefabricated vanadium slag, and prefabricated nickel slag; weighing mica and kaolinite, mixing, and grinding to obtain aluminous raw materials; evenly mixing the prefabricated iron slag and the aluminous raw materials, and calcining, to yield an iron-aluminum eutectic mineral; weighing the marble, fluorite, dolomite, and quartz, evenly mixing the marble, fluorite, dolomite, and quartz with the prefabricated copper slag, prefabricated vanadium slag, and prefabricated nickel slag to yield a first mixture; grinding the iron-aluminum eutectic mineral to yield powders, and calcining a second mixture of the first mixture and the powders, to yield the cement clinker; and cooling the cement clinker, and grinding a third mixture of the cooled cement clinker and the gypsum, to yield the Portland cement.

Abstract: Provided are a single-domain antibody against human programmed death-ligand 1 (PD-L1) and application thereof. The PD-L1 binding molecule of the present invention can be used for treating and/or preventing, or diagnosing PD-L1 related diseases such as tumors.

Abstract: An example electronic device includes a controller to determine a user touch detection by a power adaptor coupled to the electronic device to operate the electronic device in an AC power mode. The power adaptor may comprise a proximity sensor to detect a user touch for detachment of the power adaptor from the electronic device, and a control circuit to operate a configuration pin in a low output mode to signal user touch detection. The controller may initiate central processing unit (CPU) throttling to reduce power consumption by the electronic device. The controller may further stop CPU throttling in response to detecting that the power adaptor has been detached from the electronic device. Further, the controller may switch the electronic device to a DC power mode to operate using DC power supplied by a battery of the electronic device in response to power adaptor detachment.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first nanostructure over the substrate. The first nanostructure has a (001) surface, the first nanostructure has a first channel direction on the (001) surface, and the first channel direction is [0 1 0] or [0 ?1 0]. The semiconductor device structure includes a gate stack surrounding the first nanostructure. The semiconductor device structure includes a first source/drain structure and a second source/drain structure over the substrate and over opposite sides of the gate stack. The first nanostructure is between the first source/drain structure and the second source/drain structure, and the first channel direction is from the first source/drain structure to the second source/drain structure.

Abstract: A semiconductor device includes a semiconductor substrate, an interfacial layer formed on the semiconductor substrate, a high-k dielectric layer formed on the interfacial layer, and a conductive gate electrode layer formed on the high-k dielectric layer. At least one of the high-k dielectric layer and the interfacial layer is doped with: a first dopant species, a second dopant species, and a third dopant species. The first dopant species and the second dopant species form a plurality of first dipole elements having a first polarity. The third dopant species forms a plurality of second dipole elements having a second polarity, and the first and second polarities are opposite.

Abstract: A semiconductor device includes a channel layer, an interfacial layer, a gate dielectric layer, a gate electrode, dipole elements, and additional elements. The interfacial layer is disposed on the channel layer, and includes an insulating material. The gate dielectric layer is disposed over the interfacial layer such that the channel layer is separated from the gate dielectric layer by the interfacial layer. The gate electrode is disposed on the gate dielectric layer. The dipole elements are present in at least one of the interfacial layer and the gate dielectric layer in a predetermined amount such that the semiconductor device has a predetermined threshold voltage. The additional elements are located at a region where the dipole elements are present so as to reduce interfacial defects caused by the dipole elements. The additional elements are different from the dipole elements. Methods for manufacturing the semiconductor device are also disclosed.

Abstract: Described herein is a method for removing deposits off a surface of a chamber component. The method includes receiving a chamber component, and fixing the chamber component in a fixture. A slurry is then applied to a surface of the chamber component, where the slurry has a pH of about 5 to about 9. The surface is then polished using a polish pad and the slurry. The surface roughness of the surface after polishing is within about 10% of the surface roughness before polishing, and wherein deposits on the surface of the chamber component are removed by polishing. An alternative method for removing deposits is also presented, wherein the chamber component is heated to a temperature of about 500° C. to about 1500° C.

Abstract: A method includes forming a fin structure including a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over a substrate. A dummy gate structure is formed across the fin structure. The exposed second portions of the fin structure are removed. A selective etching process is performed, using a gas mixture including a hydrogen-containing gas and a fluorine-containing gas, to laterally recess the first semiconductor layers. Inner spacers are formed on opposite end surfaces of the laterally recessed first semiconductor layers. Source/drain epitaxial structures are formed on opposite end surfaces of the second semiconductor layers. The dummy gate structure is removed to expose the first portion of the fin structure. The laterally recessed first semiconductor layers are removed. A gate structure is formed to surround each of the second semiconductor layers.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a semiconductor substrate having a first region and a second region; a first fin active region of a first semiconductor material disposed within the first region, oriented in a first direction, wherein the first fin active region has a <100> crystalline direction along the first direction; and a second fin active region of a second semiconductor material disposed within the second region and oriented in the first direction, wherein the second fin active region has a <110> crystalline direction along the first direction.

Abstract: An extrusion die (16) including a plurality of pins (38) having side surfaces defining an intersecting array of slots (30) extending axially into the die (16) from a discharge face (34) of the die (16). A plurality of feedholes (28) extend axially from an inlet face (32) of the die (16) opposite to the discharge face (34). The feedholes (28) connect with the slots (30) at intersections (35) within the die (16) to create a flow path from the inlet face (32) to the discharge face (34). A first coating (42) is on at least a portion of the feedholes (28) in a first zone (46) extending over a first axial length of the flow path. A second coating (44) that is different than the first coating (42) is on at least a portion of the side surfaces (37) of the pins (38) in a second zone (48) extending over a second axial length of the flow path. Methods of fabricating an extrusion die (16) and manufacturing a ceramic article (100), such as a honeycomb body, are also disclosed.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first nanostructure over the substrate. The first nanostructure has a first channel direction, and the first channel direction is [1 0 0], [?1 0 0], [0 1 0], or [0 ?1 0]. The semiconductor device structure includes a gate stack over the substrate and surrounding the first nanostructure. The semiconductor device structure includes a first source/drain structure and a second source/drain structure over the substrate and over opposite sides of the gate stack.

Abstract: A semiconductor device with different configurations of contact structures and a method of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure disposed on the substrate, a gate structure disposed on the fin structure, a source/drain (S/D) region disposed adjacent to the gate structure, a contact structure disposed on the S/D region, and a dipole layer disposed at an interface between the ternary compound layer and the S/D region. The contact structure includes a ternary compound layer disposed on the S/D region, a work function metal (WFM) silicide layer disposed on the ternary compound layer, and a contact plug disposed on the WFM silicide layer.

Abstract: A coated ceramic honeycomb body comprising a honeycomb structure comprising a matrix of intersecting porous walls forming a plurality of axially-extending channels, at least some of the plurality of axially-extending channels being plugged to form inlet channels and outlet channels, wherein a total surface area of the outlet channels is greater than a total surface area of the inlet channels, and wherein a catalyst is preferentially located within the outlet channels. and preferentially disposed on non-filtration walls of the outlet channels. Methods and apparatus configured to preferentially apply a catalyst-containing slurry to the outlet channels and non-filtration walls are provided, as are other aspects.

Abstract: A semiconductor device includes a first electrode layer, a ferroelectric layer, a first alignment layer and a second electrode layer. A material of the first alignment layer includes rare-earth metal oxide. The ferroelectric layer and the first alignment layer are disposed between the first electrode layer and the second electrode layer, and the first alignment layer is disposed between the ferroelectric layer and the first electrode layer.