Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.

Abstract: An augmented reality (AR) display is provided. The display comprises a light field generator and a birdbath eyepiece. The light field generator generates a light field as an output. The birdbath eyepiece connects to the light field generator for receiving and projecting the light field to human eye. The birdbath eyepiece comprises a beam splitter and a combiner. The combiner has a curved surface. Each beam of the light field is split into two beams by the beam splitter with one of the split beams reflected by the combiner. Three states-of-use of the birdbath eyepiece are provided for the near-eye light field AR display to transmit the light field to the human eye. A low f-number (or focal ratio) and a large eyebox are obtained to effectively expand the field of view and increase the volume of space within which the human eye can receive the light field.

Abstract: A two-phase immersion-type heat dissipation structure having acute-angle notched structures is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins has first and second surfaces defined thereon and connected to each other. An angle between the first surface and the fin surface is from 80 degrees to 100 degrees, and an angle between the second surface and the fin surface is less than 75 degrees.

Abstract: A two-phase immersion-cooling heat-dissipation composite structure is provided. The heat-dissipation composite structure includes a heat dissipation base, a plurality of high-thermal-conductivity fins, and at least one high-porosity solid structure. The heat dissipation base has a first surface and a second surface that face away from each other. The second surface of the heat dissipation base is in contact with a heating element immersed in a two-phase coolant. The first surface of the heat dissipation base is connected to the high-thermal-conductivity fins. The at least one high-porosity solid structure is located at the first surface of the heat dissipation base, and is connected and alternately arranged between side walls of two adjacent ones of the high-thermal-conductivity fins. Each of the high-porosity solid structure includes a plurality of closed holes and a plurality of open holes.

Abstract: A remote controller is provided. The remote controller includes a motion sensing circuit and a wireless communication circuit electrically connected to the motion sensing circuit. The motion sensing circuit determines whether or not a motion of the remote controller complies with one of multiple reference motions. When the motion of the remote controller complies with one of the reference motions, the wireless communication circuit is switched from a sleep state to a working state. The wireless communication circuit that is in the working state determines whether or not a received signal strength indication between the remote controller and a controlled device is greater than or equal to a strength threshold. When the received signal strength indication is less than the strength threshold, the wireless communication circuit is switched from the working state to the sleep state.

Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: A data processing circuit and a fault mitigating method are provided. The method is adapted for a memory having at least one fault bit. The memory provides a block for data storage. A difference between an output of a value of a plurality of bits input to at least one computing layer in a neural network and a correct value is determined. The bits are respectively considered the at least one fault bit. A repair condition is determined based on the difference. The repair condition includes a correspondence between a position where the fault bit is located in the block and at least one non-fault bit in the memory. A value of at least one non-fault bit of the memory replaces a value of the fault bit based on the repair condition.

Abstract: A data processing circuit and a fault-mitigating method are provided. In the method, multiple sub-sequences are divided from sequence data. A first sub-sequence of the sub-sequences is accessed from a memory for a multiply-accumulate (MAC) operation to obtain a first computed result. The MAC operation is performed on a second sub-sequence of the sub-sequences in the memory to obtain a second computed result. The first and the second computed results are combined, where the combined result of the first and the second computed results is related to the result of the MAC operation on the sequence data directly. Accordingly, the error rate could be reduced, so as to mitigate fault.

Abstract: A semiconductor structure includes a substrate, an interconnection structure disposed over the substrate and a first memory cell. The first memory cell is disposed over the substrate and embedded in dielectric layers of the interconnection structure. The first memory cell includes a first transistor and a first data storage structure. The first transistor is disposed on a first base dielectric layer and embedded in a first dielectric layer. The first data storage structure is embedded in a second dielectric layer and electrically connected to the first transistor. The first data storage structure includes a first electrode, a second electrode and a storage layer sandwiched between the first electrode and the second electrode.

Abstract: A two-phase immersion-type heat dissipation structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate and a plurality of non-vertical fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other. The non-fin surface is configured to be in contact with a heating element immersed in a two-phase coolant. The fin surface is connected with the non-vertical fins, a cross-sectional contour of one of the non-vertical fins has a top end point and a bottom end point connected with the fin surface, and the top and bottom end points are opposite to each other. A length of a cross-sectional contour line defined from the top end point to the bottom end point is greater than a perpendicular line length of a perpendicular line defined from the top end point to the fin surface.

Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: A high fiber count, ferrule-terminated optical fiber cable assembly includes a high density two-dimensional array of optical fibers extending through a single aperture of a ferrule, with the optical fibers within the ferrule aperture each having a core, a cladding layer, and a hard coating layer (e.g., having an elastic modulus greater than 100 MPa). Hard coated optical fibers are arranged very close to (e.g., within two microns of, or in contact with) one another, with a substantially constant fiber pitch within the ferrule. A fusion splice region may be provided between ferrule terminated hard-coated optical fibers and conventional optical fibers lacking a hard coating. High optical fiber density and compact ferrule size permits a significant reduction in connector width, enabling a numerical reduction or elimination of staggered lengths of cable portions for coupling ultra-high density optical fiber cables.

Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC) in which a memory structure comprises an inhibition layer inserted between two ferroelectric layers to create a tetragonal-phase dominant ferroelectric structure. In some embodiments, the ferroelectric structure includes a first ferroelectric layer, a second ferroelectric layer overlying the first ferroelectric layer, and a first inhibition layer disposed between the first and second ferroelectric layers and bordering the second ferroelectric layer. The first inhibition layer is a different material than the first and second ferroelectric layers.

Abstract: A two-phase immersion-type heat dissipation structure having skived fin with high porosity is provided. The two-phase immersion-type heat dissipation structure having skived fin with high porosity includes a porous heat dissipation structure having a total porosity that is equal to or greater than 5%. The porous heat dissipation structure includes a porous substrate and a plurality of porous and skived fins. The porous substrate has a first surface and a second surface that face away from each other. The second surface of the porous substrate is configured to be in contact with a heating element that is immersed in a two-phase coolant. The plurality of porous and skived fins are integrally formed on the first surface of the porous substrate by skiving. A first porosity of the plurality of porous and skived fins is greater than a second porosity of the porous substrate.

Abstract: A memory device and method of forming the same are provided. The memory device includes a first memory cell disposed over a substrate. The first memory cell includes a transistor and a data storage structure coupled to the transistor. The transistor includes a gate pillar structure, a channel layer laterally wrapping around the gate pillar structure, a source electrode surrounding the channel layer, and a drain electrode surrounding the channel layer. The drain electrode is separated from the source electrode a dielectric layer therebetween. The data storage structure includes a data storage layer surrounding the channel layer and sandwiched between a first electrode and a second electrode. The drain electrode of the transistor and the first electrode of the data storage structure share a common conductive layer.

Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: A two-phase immersion-type heat dissipation structure having a porous structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, a plurality of fins, and a reinforcement frame. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fins are integrally formed on the fin surface. A porous structure is covered onto at least one portion of the fin surface and at least one portion of the plurality of fins, and has a porosity of from 10% to 50% and a thickness that is from 0.1 mm to 1 mm. The reinforcement frame is bonded to the heat dissipation substrate and surrounds another one portion of the plurality of fins.

Abstract: A semiconductor structure includes a substrate, an interconnection structure disposed over the substrate and a first memory cell. The first memory cell is disposed over the substrate and embedded in dielectric layers of the interconnection structure. The first memory cell includes a first transistor and a first data storage structure. The first transistor is disposed on a first base dielectric layer and embedded in a first dielectric layer. The first data storage structure is embedded in a second dielectric layer and electrically connected to the first transistor. The first data storage structure includes a first electrode, a second electrode and a storage layer sandwiched between the first electrode and the second electrode.

Abstract: A security apparatus having a lock head and lock body is disclosed. The lock head includes lock fingers capable of shifting horizontally. When collapsed, the lock fingers may be withdrawn from a security slot of a portable electronic device. Engaging members are set at the lock head and lock body respectively such that the two can be secured together or be readily removable from each other when needed. The lock body includes a locking mechanism operably coupled to the lock head. Configurations of the lock fingers are alterable via the locking mechanism. The lock head and the locking mechanism are on different planes.

Abstract: A method for determining phase locking of critical arc light includes: step 1: monitoring and collecting light radiation intensity of an arc inside a switch cabinet in real time, and converting the collected light radiation intensity into an electrical signal; step 2: extracting a power-frequency fundamental wave of the electrical signal, comparing an amplitude of the power-frequency fundamental wave of the electrical signal with a first threshold, and generating a pre-warning signal based on a comparison result of the first threshold; step 3: comparing the amplitude of the power-frequency fundamental wave of the electrical signal with a second threshold voltage, and generating a control signal based on a comparison result of the second threshold voltage and a protection time threshold; and step 4: protecting the switch cabinet under the critical arc light environment based on the pre-warning signal and the control signal.