Patents by Inventor Ming Wu

Ming Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240098336
    Abstract: A method for fast starting up a television display function and a television system are provided. In the method, when a television device is powered on, the television system operated in the television device performs a hardware initialization and a fast start-up procedure. In the fast start-up procedure, a set of picture-quality parameters is loaded to the television system from a storage circuit. Display parameters of the television device are configured according to the picture-quality parameters, accordingly, a display of the television device starts to display a picture. The picture can be produced from image signals received through an external source such as a high-definition multimedia interface (HDMI) or a Display Port, a type-C interface, or other sources of the television device. The picture-quality parameters are collected and stored in the storage circuit during operation of the television system after the operating system booting procedure is completed.
    Type: Application
    Filed: September 18, 2023
    Publication date: March 21, 2024
    Inventors: YEN-HSING WU, CHIH-MING TSAO
  • Publication number: 20240095868
    Abstract: A watermark embedding method includes the following steps. The input video signal is received by a processing circuit. Grayscale information of a watermark signal is generated by the processing circuit according to a time series data and a predetermined plane. During a dark sate and a bright state in each of a plurality of consecutive periods, phases of the time series data are opposite and integral values of the grayscales of the predetermined plane are the same. The processing circuit embeds the watermark signal into the input video signal to generate an output video signal with the watermark information. The display panel displays an image according to the output video signal.
    Type: Application
    Filed: December 28, 2022
    Publication date: March 21, 2024
    Inventors: Yang-En WU, Wen-Rei GUO, Wei-Ming CHENG, Chao-Wei LI
  • Publication number: 20240097027
    Abstract: A semiconductor structure includes a semiconductor substrate, first to third isolation structures, and a conductive feature. The first to third isolation structures are over the semiconductor substrate and spaced apart from each other. The semiconductor substrate comprises a region surrounded by a sidewall of the first isolation structure and a first sidewall of the second isolation structure. The conductive feature extends vertically in the semiconductor substrate and between the between the second and third isolation structures, wherein the conductive feature has a rounded corner adjoining a second sidewall of the second isolation structure opposite the first sidewall of the second isolation structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming PAN, Chia-Ta HSIEH, Po-Wei LIU, Yun-Chi WU
  • Publication number: 20240097598
    Abstract: A motor drive unit for driving a motor of a motorized window treatment may comprise software-based and hardware-based implementations of a process for detecting and resolving a stall condition in the motor, where the hardware-based implementation is configured to reduce power delivered to the motor if the software-based implementation has not first reduced the power to the motor. A control circuit may detect a stall condition of the motor, and reduce the power delivered to the motor after a first period of time from first detecting the stall condition. The motor drive unit may comprise a stall prevention circuit configured to reduce the power delivered to the motor after a second period of time (e.g., longer than the first period of time) from determining that a rotational sensing circuit is not generating a sensor signal while the control circuit is generating a drive signal to rotate the motor.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Applicant: Lutron Technology Company LLC
    Inventors: Donald F. Hausman, JR., Chen Ming Wu
  • Publication number: 20240096985
    Abstract: Methods and devices including an air gap adjacent a contact element extending to a source/drain feature of a device are described. Some embodiments of the method include depositing a dummy layer, which is subsequently removed to form the air gap. The dummy layer and subsequent air gap may be formed after a SAC dielectric layer such as silicon nitride is formed over an adjacent metal gate structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 21, 2024
    Inventors: I-Wen WU, Chen-Ming LEE, Fu-Kai YANG, Mei-Yun WANG
  • Publication number: 20240098774
    Abstract: A method and system are provided for scheduling data transmission in a Multiple-Input Multiple-Output (MIMO) system. The MIMO system may comprise at least one MIMO transmitter and at least one MIMO receiver. Feedback from one or more receivers may be used by a transmitter to improve quality, capacity, and scheduling in MIMO communication systems. The method may include generating or receiving information pertaining to a MIMO channel metric and information pertaining to a Channel Quality Indicator (CQI) in respect of a transmitted signal; and sending a next transmission to a receiver using a MIMO mode selected in accordance with the information pertaining to the MIMO channel metric, and an adaptive coding and modulation selected in accordance with the information pertaining to the CQI.
    Type: Application
    Filed: August 24, 2023
    Publication date: March 21, 2024
    Inventors: Ming JIA, Jianming WU, Dong-Sheng YU, Peiying ZHU, Wen TONG
  • Publication number: 20240094288
    Abstract: A circuit screening system including a target circuit under test receiving a first testing signal in a first period and a second testing signal in a second period; and a clock generating circuit providing a clock signal to the target circuit under test, the clock signal triggering the target circuit under test to receive the first testing signal in the first period and the second testing signal in the second period; the clock signal having a first profile and a second profile in the first period and the second period, respectively, and the first profile and the second profile having a phase difference.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 21, 2024
    Inventors: CHI-CHE WU, TSUNG-YANG HUNG, JIA-MING GUO, YI-NA FANG, MING-YIH WANG
  • Publication number: 20240099154
    Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
  • Patent number: 11932534
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11935950
    Abstract: A device includes a first buried layer over a substrate, a second buried layer over the first buried layer, a first well over the first buried layer and the second buried layer, a first high voltage well, a second high voltage well and a third high voltage well extending through the first well, wherein the second high voltage well is between the first high voltage well and the third high voltage well, a first drain/source region in the first high voltage well, a first gate electrode over the first well, a second drain/source region in the second high voltage well and a first isolation region in the second high voltage well, and between the second drain/source region and the first gate electrode, wherein a bottom of the first isolation region is lower than a bottom of the second drain/source region.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Yu Chen, Wan-Hua Huang, Jing-Ying Chen, Kuo-Ming Wu
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20240085125
    Abstract: An immersion-type heat dissipation structure having high density heat dissipation fins is provided, which includes a heat dissipation substrate and the plurality of sheet-like heat dissipation fins. A thickness of the heat dissipation substrate is from 2 mm to 6 mm, and a bottom surface of the heat dissipation substrate contacts a heating element immersed in a two-phase coolant. The sheet-like heat dissipation fins are integrally formed on an upper surface of the heat dissipation substrate and arranged in high density. A length, a width, and a height of at least one of the sheet-like heat dissipation fins are from 60 mm to 120 mm, from 0.1 mm to 0.5 mm, and from 3 mm to 10 mm, respectively. Further, a distance between at least two of the sheet-like heat dissipation fins that are arranged in parallel to each other is from 0.1 mm to 0.5 mm.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: TZE-YANG YEH, CHING-MING YANG, CHUN-TE WU
  • Publication number: 20240082846
    Abstract: A gene sequencing reaction device, a gene sequencing system and a gene sequencing reaction method. The gene sequencing reaction device includes: a supporting platform; a dipping container disposed on the supporting platform, wherein the dipping container has a dipping reaction area, and the dipping reaction area is configured to hold a chemical reagent for gene sequencing reaction, so as to dip a sequencing chip having a DNA sample loading structure on the surface and having a DNA sample loaded thereon in the chemical reagent to perform a gene sequencing reaction; a temperature control apparatus, configured to control the temperature of the chemical reagent in the dipping reaction area; and a transfer apparatus, configured to insert the sequencing chip into the dipping reaction area or pull out the sequencing chip from the dipping reaction area.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Applicant: MGI Tech Co., LTD.
    Inventors: Wei Ma, Xun Xu, Jiabo Wu, Ming Ni, Dong Wei, Jiansheng Tang
  • Publication number: 20240089063
    Abstract: A radio physical layer protocol data unit (PPDU) sending method includes: obtaining, a radio physical layer protocol data unit (PPDU), wherein the PPDU includes a high efficiency-signal field A (HE-SIG-A) and a high efficiency-signal field B (HE-SIG-B), the HE-SIG-A includes a field indicating a quantity of orthogonal frequency division multiplexing (OFDM) symbols in the HE-SIG-B, and wherein a value of the field indicates one of the following: that the quantity of OFDM symbols included in the HE-SIG-B is greater than or equal to 16, or the quantity of OFDM symbols included in the HE-SIG-B; and sending the PPDU.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 14, 2024
    Inventors: Ming GAN, Shimon SHILO, Leonid EPSTEIN, Oded REDLICH, Xun YANG, Tao WU
  • Publication number: 20240088691
    Abstract: The battery pack with the plurality of batteries is determined to have been fully charged and set in a stationary state, the discharge operation proceeds according to specified relationships of the voltage of each battery, a first predetermined voltage difference, and a discharge starting voltage, or the balance operation proceeds according to specified relationships of the voltage of each battery, the first predetermined voltage difference, a balance starting voltage and a second predetermined voltage difference.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: CHIH-YU CHUNG, Fong-Ming CHANG, TSUNG-NAN WU
  • Publication number: 20240090173
    Abstract: A two-phase immersion-type heat dissipation structure having high density heat dissipation fins is provided. The two-phase immersion-type heat dissipation structure having high density heat dissipation fins includes a heat dissipation substrate, a plurality of sheet-like heat dissipation fins, and a reinforcement structure. A bottom surface of the heat dissipation substrate is in contact with a heating element immersed in a two-phase coolant. The plurality of sheet-like heat dissipation fins are integrally formed on an upper surface of the heat dissipation substrate and arranged in high density. An angle between at least one of the sheet-like heat dissipation fins and the upper surface of the heat dissipation substrate is from 60° to 120°. At least one of the sheet-like heat dissipation fins has a length from 50 mm to 120 mm, a width from 0.1 mm to 0.35 mm, and a height from 2 mm to 8 mm.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: TZE-YANG YEH, CHING-MING YANG, CHUN-TE WU
  • Publication number: 20240084455
    Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.
    Type: Application
    Filed: February 8, 2023
    Publication date: March 14, 2024
    Inventors: Che Wei YANG, Chih Cheng SHIH, Kuo Liang LU, Yu JIANG, Sheng-Chan LI, Kuo-Ming WU, Sheng-Chau CHEN, Chung-Yi YU, Cheng-Yuan TSAI
  • Publication number: 20240090230
    Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Ling Lu, Chen-Jun Wu, Ya-Yun Cheng, Sheng-Chih Lai, Yi-Ching Liu, Yu-Ming Lin, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11928247
    Abstract: An encryption and signature device for AI model protection is provided. The encryption and signature device for AI model protection includes a key derivation unit, a model encryption unit, a model password encryption unit, an image generation unit and a signature unit. The key derivation unit is configured to derive a model key according to a model password and a derivation function. The model encryption unit is configured to encrypt an AI model according to the model key to generate an encrypted AI model. The model password encryption unit is configured to encrypt the model password to generate an encrypted model password. The image generation unit is configured to generate an image file according to the encrypted model password and the encrypted AI model. The signature unit is configured to sign the image file according to a private key to obtain a signed image file.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: March 12, 2024
    Assignee: CVITEK CO. LTD.
    Inventors: Tsung-Hsien Lin, Jen-Shi Wu, Hsiao-Ming Chang
  • Patent number: D1018540
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 19, 2024
    Assignee: Shenzhen SQT Electronics Co., LTD.
    Inventors: Ming Wu, Haiping Xu