Abstract: Embodiments of methods and apparatus for improving gas flow in a substrate processing chamber are provided herein. In some embodiments, a substrate processing chamber includes: a chamber body and a chamber lid defining an interior volume; a substrate support disposed within the interior volume and having a support surface to support a substrate; a gas passageway disposed in the lid opposite the substrate support to supply a gas mixture to the interior volume, the gas passageway including a first portion and a second portion; a first gas inlet disposed in the first portion to supply a first gas to the first portion of the gas passageway; and a second gas inlet disposed in the second portion to supply a second gas to the second portion.

Abstract: Embodiments of target retaining apparatus and substrate processing chambers incorporating same are provided herein. In some embodiments, a target retaining apparatus includes a housing including a first slot and a second slot; a cam movably disposed in the housing, wherein movement of the cam is constrained along the first slot; a retaining arm movably coupled to the cam, wherein movement of the retaining arm is constrained along the second slot; a linking member including a first end rotatably coupled to the cam and a second end rotatably coupled to the retaining arm; and a biasing element biasing the cam towards a first position in which the retaining arm extends away from the housing.

Abstract: Embodiments of the invention generally relate to a grounding kit for a semiconductor processing chamber, and a semiconductor processing chamber having a grounding kit. More specifically, embodiments described herein relate to a grounding kit which creates an asymmetric grounding path selected to significantly reduce the asymmetries caused by an off center RF power delivery.

Abstract: Embodiments of target assemblies for use in substrate processing chambers are provided herein. In some embodiments, a target assembly includes a plate comprising a first side including a central portion and a support portion; a target disposed on the central portion; a plurality of recesses formed in the support portion; and a plurality of pads partially disposed in the plurality of recesses.

Abstract: Apparatus for physical vapor deposition are provided. In some embodiments, an apparatus for use in a physical vapor deposition substrate processing chamber includes a process shield having a central opening passing through a body of the process shield and defining a processing volume of the substrate processing chamber, wherein the process shield comprises an annular dark space shield fabricated from a ceramic material and an annular ground shield fabricated from a conductive material, and wherein a ratio of a length of the annular dark space shield to a length of the annular ground shield is about 2:1 to about 1.6:1.

Abstract: Embodiments of the invention provide sputtering targets utilized in physical vapor deposition (PVD) and methods to form such sputtering targets. In one embodiment, a sputtering target contains a target layer disposed on a backing plate, and a protective coating layer—usually containing a nickel material—covering and protecting a region of the backing plate that would otherwise be exposed to plasma during the PVD processes. In many examples, the target layer contains a nickel-platinum alloy, the backing plate contains a copper alloy (e.g., copper-zinc), and the protective coating layer contains metallic nickel. The protective coating layer eliminates the formation of highly conductive, copper contaminants typically derived by plasma erosion of the copper alloy contained within the exposed surfaces of the backing plate. Therefore, the substrates and the interior surfaces of the PVD chamber remain free of such copper contaminants during the PVD processes.

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

Abstract: Embodiments of a process kit for substrate process chambers are provided herein. In some embodiments, a process kit for a substrate process chamber may include a ring having a body and a lip extending radially inward from the body, wherein the body has a first annular channel formed in a bottom of the body; an annular conductive shield having a lower inwardly extending ledge that terminates in an upwardly extending portion configured to interface with the first annular channel of the ring; and a conductive member electrically coupling the ring to the conductive shield when the ring is disposed on the conductive shield.

Abstract: A dual magnetron particularly useful for RF plasma sputtering includes a radially stationary open-loop magnetron comprising opposed magnetic poles and rotating about a central axis to scan an outer region of a sputter target and a radially movable open-loop magnetron comprising opposed magnetic poles and rotating together with the stationary magnetron. During processing, the movable magnetron is radially positioned in the outer region with an open end abutting an open end of the stationary magnetron to form a single open-loop magnetron. During cleaning, part of the movable magnetron is moved radially inwardly to scan and clean an inner region of the target not scanned by the stationary magnetron. The movable magnetron can be mounted on an arm pivoting about an axis at periphery of a rotating disk-shaped plate mounting the stationary magnetron so the arm centrifugally moves between radial positions dependent upon the rotation rate or direction.

Abstract: According to embodiments provide a method for forming dielectric films using physical vapor deposition chamber. Particularly, a pasting process may be performed to apply a conductive coating over inner surfaces of the physical vapor deposition chamber. The pasting process may be performed under adjusted process parameters, such as increased spacing and/or increased chamber pressure. The adjusted parameters allow the conductive coating to be formed more efficiently and effectively.

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer. The method also includes depositing a refractory metal nitride film layer on the conductive film layer, depositing a silicon-containing film layer on the refractory metal nitride film layer, and depositing a tungsten film layer on the silicon-containing film layer.

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer.

Abstract: Embodiments of process kits for substrate supports of semiconductor substrate process chambers are provided herein. In some embodiments, a process kit for a semiconductor process chamber may include an annular body being substantially horizontal and having an inner and an outer edge, and an upper and a lower surface; an inner lip disposed proximate the inner edge and extending vertically from the upper surface; and an outer lip disposed proximate the outer edge and on the lower surface, and having a shape conforming to a surface of the substrate support pedestal. In some embodiments, a process kit for a semiconductor process chamber my include an annular body having an inner and an outer edge, and having an upper and lower surface, the upper surface disposed at a downward angle of between about 5-65 degrees in an radially outward direction from the inner edge toward the outer edge.

Abstract: Embodiments of the invention provide a method and apparatus for protecting a susceptor during a cleaning operation by loading a ceramic cover substrate containing either aluminum nitride or beryllium oxide onto the susceptor before introducing the cleaning agent into the chamber. In one embodiment, an aluminum nitride ceramic cover substrate is provided which includes an aluminum nitride ceramic wafer having a thermal conductivity of greater than 160 W/m-K, a circular-shaped geometry having a diameter within a range from about 11 inches to about 13 inches, a thickness within a range from about 0.030 inches to about 0.060 inches, and a flatness of about 0.010 inches or less. The thermal conductivity may be about 180 W/m-K, about 190 W/m-K, or greater. The thickness may be within a range from about 0.035 inches to about 0.050 inches, and the flatness may be about 0.008 inches, about 0.006 inches, or less.

Abstract: Embodiments of the invention generally relate to a grounding kit for a semiconductor processing chamber, and a semiconductor processing chamber having a grounding kit. More specifically, embodiments described herein relate to a grounding kit which creates an asymmetric grounding path selected to significantly reduce the asymmetries caused by an off center RF power delivery.

Abstract: Embodiments of the invention provide sputtering targets utilized in physical vapor deposition (PVD) and methods to form such sputtering targets. In one embodiment, a sputtering target contains a target layer disposed on a backing plate, and a protective coating layer—usually containing a nickel material—covering and protecting a region of the backing plate that would otherwise be exposed to plasma during the PVD processes. In many examples, the target layer contains a nickel-platinum alloy, the backing plate contains a copper alloy (e.g., copper-zinc), and the protective coating layer contains metallic nickel. The protective coating layer eliminates the formation of highly conductive, copper contaminants typically derived by plasma erosion of the copper alloy contained within the exposed surfaces of the backing plate. Therefore, the substrates and the interior surfaces of the PVD chamber remain free of such copper contaminants during the PVD processes.

Abstract: Embodiments described herein provide a semiconductor device and methods and apparatuses of forming the same. The semiconductor device includes a substrate having a source and drain region and a gate electrode stack on the substrate between the source and drain regions. The gate electrode stack includes a conductive film layer on a gate dielectric layer, a refractory metal nitride film layer on the conductive film layer, a silicon-containing film layer on the refractory metal nitride film layer, and a tungsten film layer on the silicon-containing film layer. In one embodiment, the method includes positioning a substrate within a processing chamber, wherein the substrate includes a source and drain region, a gate dielectric layer between the source and drain regions, and a conductive film layer on the gate dielectric layer.

Abstract: An apparatus for An apparatus for generating excimer radiation is provided. The apparatus includes a housing having a housing wall. An electrode is configured within the housing. A tubular body is around the electrode. The tubular body includes an outer wall and an inner wall. At least one inert gas is between the outer wall and the inner wall, wherein the housing wall and the electrode are configured to excite the inert gas to illuminate an excimer light for curing.

Abstract: Apparatus and methods for performing plasma processing on a wafer supported on a pedestal are provided. The apparatus can include a pedestal on which the wafer can be supported, a variable capacitor having a variable capacitance, a motor attached to the variable capacitor which varies the capacitance of the variable capacitor, a motor controller connected to the motor that causes the motor to rotate, and an output from the variable capacitor connected to the pedestal. A desired state of the variable capacitor is associated with a process recipe in a process controller. When the process recipe is executed the variable capacitor is placed in the desired state.

Abstract: An exhaust foreline for purging fluids from a semiconductor fabrication chamber is described. The foreline may include a first, second and third ports independently coupled to the chamber. A semiconductor fabrication system is also described that includes a substrate chamber that has a first, second and third interface port. The system may also include a multi-port foreline that has a first, second and third port, where the first foreline port is coupled to the first interface port, the second foreline port is coupled to the second interface port, and the third foreline port is coupled to the third interface port. The system may further include an exhaust vacuum coupled to the multi-port foreline.