Patents by Inventor Munehiro Azami

Munehiro Azami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7151278
    Abstract: A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD?V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: December 19, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shou Nagao, Munehiro Azami, Yoshifumi Tanada
  • Publication number: 20060267916
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Application
    Filed: August 3, 2006
    Publication date: November 30, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Publication number: 20060255837
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Application
    Filed: July 20, 2006
    Publication date: November 16, 2006
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami, Junya Maruyama
  • Patent number: 7129121
    Abstract: A method for manufacturing a semiconductor device having steps of forming an amorphous semiconductor on a substrate having an insulating surface; patterning the amorphous semiconductor to form plural first island-like semiconductors; irradiating a linearly condensed laser beam on the plural first island-like semiconductors while relatively scanning the substrate, thus crystallizing the plural first island-like semiconductors; patterning the plural first island-like semiconductors that have been crystallized to form plural second island-like semiconductors; forming plural transistors using the plural second island-like semiconductors; and forming a unit circuit using a predetermined number of the transistors, where the second island-like semiconductors used for the predetermined number of the transistors are formed from the first island-like semiconductors that are different from each other.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: October 31, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Chiho Kokubo, Aiko Shiga, Atsuo Isobe, Hiroshi Shibata, Shunpei Yamazaki
  • Patent number: 7123227
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: October 17, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Publication number: 20060221101
    Abstract: A gray-scale power supply line supplied to a source signal line driving circuit is made only one system, and each of D/A conversion circuits drives source signal lines in which three source signal lines corresponding to RGB are made a unit and the number of which is a multiple of 3. The periods in which respective source line selecting circuits select source signal lines corresponding to respective colors of the RGB are made synchronous with each other, and the power supply voltage applied to the gray-scale power supply line is changed in one horizontal writing period, so that power supply voltages corresponding to R. G and B are respectively applied to the gray-scale power supply line in periods while the source signal lines of R, G and B are respectively selected.
    Type: Application
    Filed: May 22, 2006
    Publication date: October 5, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Publication number: 20060202940
    Abstract: A drive circuit of a display device, which comprise only single conductive TFTs and in which amplitude of an output signal is normal, is provided. A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node á rises. When the potential of the node á reaches (VDD?VthN), the node á became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105. An output at the subsequent stage is then inputted to TFTs 102 and 103 to turn the TFTs 102 and 103 ON, while the potential of the node á drops down to turn the TFT 105 OFF.
    Type: Application
    Filed: May 25, 2006
    Publication date: September 14, 2006
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20060192699
    Abstract: In a serial-to-parallel conversion (SPC) circuit for digital data which converts the digital data serially inputted, into parallel digital data, and which outputs the parallel digital data; clock signals at frequencies which are, at the highest, ½ of the frequency of the input digital data are employed for operating the SPC circuit, whereby the SPC circuit is improved in power dissipation, stability and reliability.
    Type: Application
    Filed: May 12, 2006
    Publication date: August 31, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Mitsuaki Osame, Yutaka Shionoiri, Shou Nagao
  • Publication number: 20060187166
    Abstract: A circuit capable of reducing a consumption current is provided for a digital display device composed of unipolar TFTs. There is provided a latch circuit for holding a digital video signal. According to the latch circuit, when the digital video signal is inputted to an input electrode of a TFT (101), a non-inverting output signal is outputted from an output electrode of the TFT (101) and an inverting output signal is outputted from output electrodes of TFTs (102 and 103). Two line outputs of non-inversion and inversion are obtained. Thus, when a buffer located in a subsequent stage is operated, a period for which a direct current path is produced between a high potential and a low potential of a power source can be shortened, thereby contributing to reduction in a consumption current.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 24, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 7091750
    Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: August 15, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Shionoiri, Kiyoshi Kato, Munehiro Azami
  • Publication number: 20060170061
    Abstract: A circuit is provided which is constituted by TFTs of one conductivity type, and which is capable of outputting signals of a normal amplitude. When an input clock signal CK1 becomes a high level, each of TFTs (101, 103) is turned on to settle at a low level the potential at a signal output section (Out). A pulse is then input to a signal input section (In) and becomes high level. The gate potential of TFT (102) is increased to (VDD?V thN) and the gate is floated. TFT (102) is thus turned on. Then CK1 becomes low level and each of TFTs (101, 103) is turned off. Simultaneously, CK3 becomes high level and the potential at the signal output section is increased. Simultaneously, the potential at the gate of TFT (102) is increased to a level equal to or higher than (VDD+V thN) by the function of capacitor (104), so that the high level appearing at the signal output section (Out) becomes equal to VDD.
    Type: Application
    Filed: January 10, 2006
    Publication date: August 3, 2006
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shou Nagao, Munehiro Azami, Yoshifumi Tanada
  • Patent number: 7068076
    Abstract: A circuit capable of reducing a consumption current is provided for a digital display device composed of unipolar TFTs. There is provided a latch circuit for holding a digital video signal. According to the latch circuit, when the digital video signal is inputted to an input electrode of a TFT (101), a non-inverting output signal is outputted from an output electrode of the TFT (101) and an inverting output signal is outputted from output electrodes of TFTs (102 and 103). Two line outputs of non-inversion and inversion are obtained. Thus, when a buffer located in a subsequent stage is operated, a period for which a direct current path is produced between a high potential and a low potential of a power source can be shortened, thereby contributing to reduction in a consumption current.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: June 27, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 7057598
    Abstract: A drive circuit of a display device, which comprise only single conductive TFTs and in which amplitude of an output signal is normal, is provided. A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node á rises. When the potential of the node á reaches (VDD?VthN), the node á became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105. An output at the subsequent stage is then inputted to TFTs 102 and 103 to turn the TFTs 102 and 103 ON, while the potential of the node á drops down to turn the TFT 105 OFF.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: June 6, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 7053918
    Abstract: A gray-scale power supply line supplied to a source signal line driving circuit is made only one system, and each of D/A conversion circuits drives source signal lines in which three source signal lines corresponding to RGB are made a unit and the number of which is a multiple of 3. The periods in which respective source line selecting circuits select source signal lines corresponding to respective colors of the RGB are made synchronous with each other, and the power supply voltage applied to the gray-scale power supply line is changed in one horizontal writing period, so that power supply voltages corresponding to R, G and B are respectively applied to the gray-scale power supply line in periods while the source signal lines of R, G and B are respectively selected.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: May 30, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 7049983
    Abstract: In a serial-to-parallel conversion (SPC) circuit for digital data which converts the digital data serially inputted, into parallel digital data, and which outputs the parallel digital data; clock signals at frequencies which are, at the highest, ½ of the frequency of the input digital data are employed for operating the SPC circuit, whereby the SPC circuit is improved in power dissipation, stability and reliability.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: May 23, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Mitsuaki Osame, Yutaka Shionoiri, Shou Nagao
  • Publication number: 20060066530
    Abstract: A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 30, 2006
    Inventors: Munehiro Azami, Yoshifumi Tanada
  • Publication number: 20060061384
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node ? into a floating state. When the node ? is in the floating state, a potential of the node ? is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Application
    Filed: November 10, 2005
    Publication date: March 23, 2006
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Patent number: 6975142
    Abstract: There is provided a semiconductor device in which fabrication steps can be reduced by constructing a circuit using only TFTs of one conductivity type and in which a voltage amplitude of an output signal can be normally obtained. A capacitance (205) is provided between a gate and a source of a TFT (203) connected to an output node, and a circuit formed of TFTs (201) and (202) has a function to bring a node a into a floating state. When the node ? is in the floating state, a potential of the node a is caused higher than VDD by using gate-source capacitance coupling of the TFT (203) through the capacitance (205), thus an output signal having an amplitude of VDD-GND can be normally obtained without causing amplitude attenuation due to the threshold value of the TFT.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: December 13, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Shou Nagao, Yoshifumi Tanada
  • Publication number: 20050245007
    Abstract: A method for manufacturing a semiconductor device having steps of forming an amorphous semiconductor on a substrate having an insulating surface; patterning the amorphous semiconductor to form plural first island-like semiconductors; irradiating a linearly condensed laser beam on the plural first island-like semiconductors while relatively scanning the substrate, thus crystallizing the plural first island-like semiconductors; patterning the plural first island-like semiconductors that have been crystallized to form plural second island-like semiconductors; forming plural transistors using the plural second island-like semiconductors; and forming a unit circuit using a predetermined number of the transistors, where the second island-like semiconductors used for the predetermined number of the transistors are formed from the first island-like semiconductors that are different from each other.
    Type: Application
    Filed: June 23, 2005
    Publication date: November 3, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Chiho Kokubo, Aiko Shiga, Atsuo Isobe, Hiroshi Shibata, Shunpei Yamazaki
  • Patent number: 6958750
    Abstract: A pixel having a structure in which low voltage drive is possible is provided by a simple process. A digital image signal input from a source signal line is input to the pixel through a switching TFT. At this point, a voltage compensation circuit amplifies the voltage amplitude of the digital image signal or transforms the amplitude, and applies the result to a gate electrode of a driver TFT. On-off control of TFTs within the pixel can thus be performed normally even if the voltage of a power source for driving gate signal lines becomes lower.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: October 25, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Azami, Yoshifumi Tanada