Abstract: A method for manufacturing a magnetic memory element for use in a magnetic random access memory device to form a MgO spin current coupling layer with improved spin current coupling and reduced device area resistance (RA). The method involves depositing a magnetic free layer structure, and then depositing a MgO spin current coupling layer over the magnetic free layer. The magnetic spin current coupling layer is deposited in a sputter deposition chamber using radio frequency (RF) power. The sputter deposition of the spin current coupling layer can be performed using a MgO target without intervening oxidation steps to form a continuous layer of MgO that is not a multilayer structure of Mg and intermittent oxidation layers. Because the MgO spin transport layer deposited by this RF sputtering does not affect RA of the device, the thickness of the MgO spin transport layer can be adjusted to optimize spin transport performance.

Abstract: A magnetic random access memory chip having magnetic memory elements with different performance characteristics formed on the same chip. The magnetic memory elements can be magnetic random access memory elements. The memory chip can have a first set of magnetic random access chips having a first set of physical and performance characteristics formed in a first area of the sensor and a second set of magnetic random access chips having a second set of performance characteristics formed in a second area of the chip. For example, the first set of magnetic random access memory elements can have performance characteristics that match or exceed those of a non-volatile memory, whereas the second set of magnetic random access memory elements can have performance characteristic that match or exceed those of a static random access memory element.

Abstract: A magnetic memory element for Magnetic Random Access Memory. The magnetic memory element has improved reference layer magnetic pinning. The magnetic memory element has a magnetic free layer, a magnetic reference layer and a non-magnetic barrier layer located between the magnetic free layer and the magnetic reference layer. The magnetic reference layer has a magnetic moment that is pinned in a perpendicular orientation through exchange coupling with a synthetic antiferromagnetic structure that includes first and second magnetic structures and an antiferromagnetic exchange coupling structure located between the first and second magnetic structures. The antiferromagnetic exchange coupling structure includes a layer of Ru located between first and second layers of Pt. The Pt layers in the antiferromagnetic exchange coupling structure advantageously increases the magnetic proximity effect at both Ru interfaces, which extends the exchange coupling range of the antiferromagnetic exchange coupling layer.

Abstract: A magnetic data recording element for magnetic random access memory data recording. The magnetic data recording element includes a magnetic tunnel junction element that includes a magnetic reference layer, a magnetic free layer and a non-magnetic barrier layer located between the non-magnetic reference layer and the magnetic free layer. The magnetic reference layer includes a layer of Hf that causes the magnetic reference layer to have an increased perpendicular magnetic anisotropy. This increased perpendicular magnetic anisotropy improves reliability and stability of the magnetic data recording element by preventing loss of magnetic orientation of the magnetic reference layer such as during high writing current conditions.

Abstract: A Magnetic Random Access Memory apparatus device having a memory element formed as a magnetic tunnel junction (MTJ) pillar and having a heating element for maintaining a desired minimum temperature of the memory element. The heating element is separated from the memory element by a thin, non-magnetic, electrically insulating wall, which can be constructed of alumina. The heating element is connected with circuitry that controllably delivers electrical current to the heating element to maintain a desired minimum temperature of the memory element.

Abstract: A method for manufacturing magnetic random access memory. The method allows very high density magnetic memory elements to be formed on a magnetic memory chip. A magnetic memory element material is deposited and a diamond like carbon (DLC) hard mask is formed over the magnetic memory element material. An ion or atom bombardment process such as ion milling is performed to remove portions of the magnetic memory element material that are not protected by the hard mask to form a plurality of magnetic memory element pillars. Because the diamond like carbon hard mask is resistant to the material removal processes such as ion milling, it can be made very thin (10-20 nm), which reduces shadowing while still allowing a process such as ion milling to be used to define the magnetic data element pillars. This advantageously allows the pillars to be formed with well defined, vertical sidewalls, and avoiding shorting.

Abstract: A magnetic data recording element for magnetic random access memory data recording. The magnetic data recording element includes a magnetic tunnel junction element that includes a magnetic reference layer, a magnetic free layer and a non-magnetic barrier layer located between the non-magnetic reference layer and the magnetic free layer. The magnetic free layer includes a layer of Hf that causes the magnetic free layer to have an increased perpendicular magnetic anisotropy. This increased perpendicular magnetic anisotropy improves data retention and increases thermal stability, by preventing the magnetization of the magnetic free layer from inadvertently losing its magnetic orientation.

Abstract: A method for manufacturing a magnetic random access memory element having increased retention and low resistance area product (RA). A MgO layer is deposited to contact a magnetic free layer of the memory element. The MgO layer is deposited in a sputter deposition chamber using a DC power and a Mg target to deposit Mg. The deposition of Mg is periodically stopped and oxygen introduced into the deposition chamber. This process is repeated a desired number of times, resulting in a multi-layer structure. The resulting MgO layer provides excellent interfacial perpendicular magnetic anisotropy to the magnetic free layer while also having a low RA.

Abstract: A magnetic memory element for Magnetic Random Access Memory. The magnetic memory element has improved reference layer magnetic pinning and reduced dipole fringing field effect on the magnetic free layer. The magnetic memory element includes a magnetic reference layer having a pinned magnetization, a magnetic free layer having a switchable magnetization and a non-magnetic barrier layer between the magnetic reference layer and the magnetic free layer. The magnetic reference layer is exchange coupled with a synthetic anti-ferromagnetic structure that includes a first multi-layer structure, a second multi-layer structure and a non-magnetic anti-parallel exchange coupling layer located between the first and second multi-layer structures. Each of the first and second multi-layer structures includes a plurality of bi-layers of Pt and Co, with the Pt being deposited first and located below the Co.

Abstract: A Magnetic Tunnel Junction (MTJ) device can include a second Precessional Spin Current (PSC) magnetic layer of Ruthenium (Re) having a predetermined thickness and a predetermined smoothness. An etching process for smoothing the PSC magnetic layer can be performed in-situ with various deposition processes after a high temperature annealing of the MTJ formation.

Abstract: A method for manufacturing a magnetic random access memory element that allows for improved magnetic element pillar formation in a high density magnetic memory element array. The method allows a magnetic memory element pillar to be formed by ion milling with a lower pillar height for reduced shadowing effect. A memory element seed layer and under-layer are first formed on a substrate and layer of electrically insulating material such as silicon oxide is deposited. A chemical mechanical polishing process is performed, leaving the seed layer and under-layer surrounded by a layer of electrically insulating material having an upper surface that is coplanar with an upper surface of the under-layer. A magnetic memory element pillar is formed over the seed layer and under-layer by depositing the magnetic memory element material, forming a mask over the magnetic memory element material and performing an ion milling process to form a magnetic memory element pillar.

Abstract: Embodiments of the present invention facilitate efficient and effective increased memory cell density configuration. In one embodiment, a semiconductor device comprises: a first pillar magnetic tunnel junction (pMTJ) memory cell that comprises a first pMTJ located in a first level in the semiconductor device; and a second pillar magnetic tunnel junction (pMTJ) memory cell that comprises a second pMTJ located in a second level in the semiconductor device, wherein the second pMTJ location with respect to the first pMTJ is coordinated to comply with a reference pitch for the memory cell. A reference pitch is associated a first switch coupled to the first pMTJ and the second pitch reference component is a second switch coupled to the second pMTJ. The first switch and second switch can be transistors. The reference pitch coordination facilitates reduced pitch between memory cells and increased information storage capacity of bits per memory device area.

Abstract: A method for fabricating an array of pillars. The method includes fabricating a plurality of lines of photoresist on a hard mask stack and depositing a spacer film on top of the plurality of lines of photoresist. The method further includes etching the spacer film to remove the spacer film from the top of the plurality of lines of photoresist and stripping the plurality of lines of photoresist to leave behind to spacer lines for each resist line. The method concludes with etching the spacer lines and the hard mask stack to yield an array of pillars.

Abstract: A Magnetic Tunnel Junction (MTJ) device including pillar contacts coupling the free magnetic layer of cell pillars to a top contact. The pillar contacts are electrically isolated from one or more other portions of the cell pillar by one or more self-aligned sidewall insulators. The MTJ device further including one of a static magnetic compensation layer or an exchange spring layer in the cell pillar.

Abstract: A method for a photolithographic fabricating process to define pillars having small pitch and pillar size. The method includes coating a hard mask layer of a wafer with a photoresist. The wafer is exposed with a first line pattern comprising a plurality of parallel lines in a first direction. The wafer is then exposed with a second line pattern comprising a plurality of parallel lines in a second direction orthogonal to the first direction. The wafer is then developed to remove areas of the photoresist that were exposed by the first line pattern and the second line pattern resulting in a plurality of pillars.

Abstract: A Magnetic Tunnel Junction (MTJ) device can include a free magnetic layer having a predetermined smoothness. An etching process for smoothing the free magnetic layer can be performed in-situ with various deposition processes after a high temperature annealing of the MTJ formation.

Abstract: A method of manufacturing a Magnetic Tunnel Junction (MTJ) device including pillar contacts coupling the free magnetic layer of MTJ pillars to a top contact. The pillar contacts are electrically isolated from one or more other portions of the MTJ pillar by one or more self-aligned sidewall insulators. The MTJ device further including one of a static magnetic compensation layer or an exchange spring layer in the MTJ pillar.

Abstract: A method for manufacturing a magnetic random access memory chip having magnetic memory elements with different performance characteristics formed on the same chip. The magnetic memory elements can be magnetic random access memory elements. The memory chip can have a first set of magnetic random access chips having a first set of physical and performance characteristics formed in a first area of the sensor and a second set of magnetic random access chips having a second set of performance characteristics formed in a second area of the chip. For example, the first set of magnetic random access memory elements can have performance characteristics that match or exceed those of a non-volatile memory, whereas the second set of magnetic random access memory elements can have performance characteristic that match or exceed those of a static random access memory element.

Abstract: A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a thermal stability enhancement layer over the free layer of a magnetic tunnel junction. The thermal stability enhancement layer improves the thermal stability of the free layer, increases the magnetic moment of the free layer, while also not causing the magnetic direction of the free layer to become in plan. The thermal stability enhancement layer can be comprised of a layer of CoFeB ferromagnetic material.

Abstract: A magnetoresistive random-access memory (MRAM) is disclosed. The MRAM device reduces stray magnetic fields generated by magnetic layers of the stack, including a reference layer and magnetic layers of the synthetic antiferromagnetic layer, in a way that reduces their impact on the other layers of the stack, including a free layer and an optional filter layer, which may include a polarizer layer or a precessional spin current magnetic layer. The reduction in stray magnetic fields in the stack increases the electrical and retention performance of the stack by reducing switching asymmetry in the free layer. The reduction in stray magnetic fields also may improve performance of a filter layer, such as a precessional spin current magnetic layer by reducing asymmetry in the dynamic magnetic rotation of that layer.