Patents by Inventor Mutsuhiro Mori

Mutsuhiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7742303
    Abstract: The present invention provides a highly reliable electric power converter reduced in parasitic inductance.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: June 22, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Katsunori Azuma, Mutsuhiro Mori, Kinya Nakatsu
  • Publication number: 20100149165
    Abstract: A plasma display device of the present invention having a plurality of display cells, comprises a X electrode kept at a reference voltage, a Y electrode, an address electrode, the X electrode and the Y electrode between which sustain discharge occurs, and an address driver comprising a first switch element Q2 for outputting a low level voltage, a second switch element Q1 for outputting a high level voltage, whose withstand voltage of the second switch element is lower than the first switch element, and a diode inserted and connected between the address electrode and the second switch element.
    Type: Application
    Filed: October 30, 2009
    Publication date: June 17, 2010
    Inventors: Takuo NAGASE, Mutsuhiro Mori
  • Patent number: 7638839
    Abstract: A power semiconductor device having a low loss and a high reliability and a power conversion device using the power semiconductor device are provided. In the power semiconductor device, a plurality of MOS type trench gates are positioned to be spaced by at-least two types of intervals therebetween, a low-resistance floating n+ layer is positioned on a main surface of a semiconductor substrate adjacent to a floating p layer positioned between the adjacent MOS type trench gates having the broad interval to achieve consistency between a low output value and a high breakdown resistance.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: December 29, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Taiga Arai, Mutsuhiro Mori
  • Publication number: 20090294847
    Abstract: A plasma display apparatus which in its driving circuit mounts at least one of IGBTs having diodes built-in which are reverse conducting in a driving device which supplies a light emitting current and IGBTs having diodes built-in which have a reverse blocking function in a driving device which collects and charges the power.
    Type: Application
    Filed: August 5, 2009
    Publication date: December 3, 2009
    Inventor: Mutsuhiro Mori
  • Patent number: 7602045
    Abstract: In a semiconductor device having a pair of IGBT and diode which are connected to each other in inverse-parallel in which a collector-electrode of the IGBT and a cathode-electrode of the diode are wired to each other, and an emitter-electrode of the IGBT and an anode-electrode of the diode are wired to each other, when a breakdown voltage of a junction of a p-type emitter layer and an n-type buffer layer of the IGBT is represented as BVec, and a forward voltage occurring while the diode transits from a state of blocking to a state of forward conduction is represented as VF, a relationship of VF<BVec is satisfied in a predetermined current value Id of a current flowing in the diode, and the maximal doping concentration of the n-type cathode layer of the diode is higher than that of the n-type buffer layer of the IGBT.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: October 13, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Takuo Nagase, Mutsuhiro Mori
  • Patent number: 7586467
    Abstract: A small-sized, low-loss load drive circuit, an integrated circuit for that drive circuit, and an inexpensive plasma display using that integrated circuit. In the load drive circuit that responds to switching commands to supply a high or low voltage to a load by switching, the source-drain voltage of an output-stage n-type MOS transistor of a flip-flop is supplied between the gate and cathode of a main IGBT. In order to hold this voltage, the power source to the flip-flop is supplied from a main power source or a charge pump power circuit connected at the fixed potential point of the main power source. In addition, a discharge prevention circuit and discharge prevention elements and are provided in order that the potential of the power source can be maintained higher than the positive potential of main power source.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: September 8, 2009
    Assignees: Hitachi, Ltd., Advanced PDP Development Center Corporation
    Inventors: Junichi Sakano, Kenji Hara, Mutsuhiro Mori
  • Patent number: 7570008
    Abstract: The present invention provides a power module, power converter, and vehicular electric machine system capable of reducing inductance of a peripheral section of an output terminal in a power module, and additionally, reducing a surge voltage. A positive emitter conductor 3 connected to an emitter electrode of a positive power semiconductor element Mpu and an output terminal U are electrically interconnected by using a plurality of aluminum wires 7, a negative collector conductor 4 connected to a collector electrode of a negative power semiconductor element Mnu and the output terminal U are electrically interconnected by using a plurality of aluminum wires 9, and the positive emitter conductor 3 connected to the emitter electrode of the positive power semiconductor element Mpu and the negative collector conductor 4 connected to the collector electrode of the negative power semiconductor element Mnu are further electrically interconnected by using a plurality of aluminum wires 8.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: August 4, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Masamitsu Inaba, Katsunori Azuma, Mutsuhiro Mori, Kinya Nakatsu
  • Publication number: 20090167748
    Abstract: A plasma display apparatus wherein during the period for which the lighting of the AC type PDP panel is sustained, the electrodes on one side of the panel are maintained at a constant potential whereas the electrodes on the other side of the panel are supplied alternately with a positive voltage and a negative voltage, the plasma display apparatus having a means that feeds power flowing toward the address power source into a separate power source.
    Type: Application
    Filed: December 23, 2008
    Publication date: July 2, 2009
    Inventors: Mutsuhiro MORI, Takuo Nagase
  • Patent number: 7541858
    Abstract: An ignitor comprising a circuit with a millisecond order time constant and with a minimum circuit size and area, which is capable of self-shutdown without leading to erroneous ignition upon detection of an abnormality. An ignitor 1 capable of self-shutdown upon detection of an abnormality comprises an abnormality detection circuit 12 whose rise output is applied to the gate of a self-shutdown MOSFET 33 via an integration circuit 33 comprised of a diode 8 and a capacitor 9. The gate voltage of IGBT 5a, which is a main-current switching device, can be decremented.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: June 2, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Seigou Yukutake, Mutsuhiro Mori, Yasuhiko Kohno
  • Publication number: 20090034306
    Abstract: The present invention provides a power module, power converter, and vehicular electric machine system capable of reducing inductance of a peripheral section of an output terminal in a power module, and additionally, reducing a surge voltage. A positive emitter conductor 3 connected to an emitter electrode of a positive power semiconductor element Mpu and an output terminal U are electrically interconnected by using a plurality of aluminum wires 7, a negative collector conductor 4 connected to a collector electrode of a negative power semiconductor element Mnu and the output terminal U are electrically interconnected by using a plurality of aluminum wires 9, and the positive emitter conductor 3 connected to the emitter electrode of the positive power semiconductor element Mpu and the negative collector conductor 4 connected to the collector electrode of the negative power semiconductor element Mnu are further electrically interconnected by using a plurality of aluminum wires 8.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Applicant: Hitachi, Ltd.
    Inventors: Masamitsu INABA, Katsunori Azuma, Mutsuhiro Mori, Kinya Nakatsu
  • Publication number: 20090015573
    Abstract: A plasma display apparatus having a plurality of display cells for prolonging the luminous brightness lifetime in the single-sided drive mode has a first sustaining electrode, a second sustaining electrode connected to reference potential and cooperating with the first sustaining electrode to perform sustain discharge through a discharge space of a display cell, and an address electrode, an electrical capacitance set up between the second sustaining electrode and the discharge space is larger than that set up between the first sustaining electrode and the discharge space.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 15, 2009
    Inventors: Takuo Nagase, Mutsuhiro Mori, Junichi Sakano
  • Publication number: 20080283867
    Abstract: A fourth semiconductor region of a first conduction type is provided in a partial region of a third semiconductor region of a second conduction type. This configuration enhances the blocking voltage at the time when the sheet carrier concentration of a fifth semiconductor region is enhanced.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 20, 2008
    Inventors: Mutsuhiro Mori, Taiga Arai
  • Publication number: 20080265331
    Abstract: In a manufacturing method of a SOI type high withstand voltage semiconductor device formed on a support substrate via an insulation film, a small-sized semiconductor device having small dispersion of withstand voltage is manufactured by introducing impurities into the whole surface of a p-type or n-type SOI substrate having an impurity concentration of 2E14 cm?3 or less and serving as an active layer of the semiconductor device with an ion implantation method and thereby forming a drift layer.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 30, 2008
    Inventors: Junichi Sakano, Kenji Hara, Shinji Shirakawa, Taiga Arai, Mutsuhiro Mori
  • Publication number: 20080217649
    Abstract: A power semiconductor device having a low loss and a high reliability and a power conversion device using the power semiconductor device are provided. In the power semiconductor device, a plurality of MOS type trench gates are positioned to be spaced by at-least two types of intervals therebetween, a low-resistance floating n+ layer is positioned on a main surface of a semiconductor substrate adjacent to a floating p layer positioned between the adjacent MOS type trench gates having the broad interval to achieve consistency between a low output value and a high breakdown resistance.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Inventors: Taiga Arai, Mutsuhiro Mori
  • Publication number: 20080143265
    Abstract: To provide an AC-PDP capable of achieving low power consumption and low cost, a driving method is adopted in which, during a period of sustaining light emission of the AC-PDP, an electrode of one side of the panel is fixed at a predetermined potential, and positive and negative voltages are alternately applied to an electrode of the other side of the panel. In addition, an IGBT is used as a switch element. Thus, with a half-bridge driving method using an IGBT as a switch element, it is possible to simultaneously achieve a reduction in loss of a driving circuit of the AC-PDP and a reduction in the number of components thereof, such reductions not being able to be achieved by the conventional techniques.
    Type: Application
    Filed: December 13, 2007
    Publication date: June 19, 2008
    Inventors: Takuo Nagase, Mutsuhiro Mori
  • Publication number: 20080049476
    Abstract: The present invention provides a highly reliable electric power converter reduced in parasitic inductance.
    Type: Application
    Filed: July 19, 2007
    Publication date: February 28, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Katsunori AZUMA, Mutsuhiro Mori, Kinya Nakatsu
  • Publication number: 20070290305
    Abstract: An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress may be escaped. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board served as current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and crack of the cover plate.
    Type: Application
    Filed: June 13, 2007
    Publication date: December 20, 2007
    Inventors: Kazuhiro Oyama, Mutsuhiro Mori, Katsuaki Saito, Yoshihiko Koike
  • Publication number: 20070210386
    Abstract: A plasma display apparatus which in its driving circuit mounts at least one of IGBTs having diodes built-in which are reverse conducting in a driving device which supplies a light emitting current and IGBTs having diodes built-in which have a reverse blocking function in a driving device which collects and charges the power.
    Type: Application
    Filed: January 19, 2007
    Publication date: September 13, 2007
    Inventor: Mutsuhiro Mori
  • Publication number: 20070194346
    Abstract: In a semiconductor device having a pair of IGBT and diode which are connected to each other in inverse-parallel in which a collector-electrode of the IGBT and a cathode-electrode of the diode are wired to each other, and an emitter-electrode of the IGBT and an anode-electrode of the diode are wired to each other, when a breakdown voltage of a junction of a p-type emitter layer and an n-type buffer layer of the IGBT is represented as BVec, and a forward voltage occurring while the diode transits from a state of blocking to a state of forward conduction is represented as VF, a relationship of VF<BVec is satisfied in a predetermined current value Id of a current flowing in the diode, and the maximal doping concentration of the n-type cathode layer of the diode is higher than that of the n-type buffer layer of the IGBT.
    Type: Application
    Filed: January 19, 2007
    Publication date: August 23, 2007
    Inventors: Takuo Nagase, Mutsuhiro Mori
  • Publication number: 20070182384
    Abstract: An inverter device is mounted on the rotating electric machine body The inverter device includes a module unit having a converter circuit and a control unit that controls the operation of the converter circuit. The converter circuit is configured by connecting a plurality of the following series circuits in parallel, each of the series circuits includes a P-channel MOS semiconductor device disposed at a higher potential side and an N-channel MOS semiconductor device disposed at a lower potential side which are electrically connected in series. An electric power that is supplied from a battery or an electric power that is supplied to the battery is controlled.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 9, 2007
    Applicant: HITACHI LTD.
    Inventors: Shinji SHIRAKAWA, Mutsuhiro MORI, Masamitsu INABA, Tatsumi YAMAUCHI, Masahiro IWAMURA, Keiichi MASHINO, Masanori TSUCHIYA