Patents by Inventor Mutsuhiro Mori

Mutsuhiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5101244
    Abstract: A semiconductor device has a first diode having a pn junction and a second diode having a combination of a Schottky barrier and a pn junction in a current-passing direction provided side by side in a direction perpendicular to the current-passing direction. When a forward current with a current density J.sub.F is passed into the second diodes, the relation ##EQU1## is established in a forward voltage V.sub.F range of 0.1 (V) to 0.3 (V), where k represents the Boltzmann constant, T represents the absolute temperature, and q represents the quantity of electron charges.
    Type: Grant
    Filed: February 26, 1991
    Date of Patent: March 31, 1992
    Assignees: Hitachi, Ltd., Hitachi Haramachi Semiconductor Ltd.
    Inventors: Mutsuhiro Mori, Yasumiti Yasuda, Naoki Sakurai, Hidetoshi Arakawa, Hiroshi Owada
  • Patent number: 5032532
    Abstract: A method for fabricating an insulated gate semiconductor device comprises the steps of forming insulated gates on an n.sup.- -layer surface, forming p-well layers in the n.sup.- -layer using the insulated gates as masks, forming phosphosilicate glass layers on the side walls of the insulated gates and diffusing the impurities from the phosphosilicate glass layers into the p-well layers to form n.sup.+ -source layer.
    Type: Grant
    Filed: August 17, 1988
    Date of Patent: July 16, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Mutsuhiro Mori, Tomoyuki Tanaka, Yasumichi Yasuda, Yasunori Nakano
  • Patent number: 4935799
    Abstract: Disclosed is a composite semiconductor device which comprises: a second and a third semiconductor regions of a second conductivity type formed in a first semiconductor region of a first conductivity type independently of each other and so as to be exposed on one main surface of a semiconductor substrate; a fourth and a fifth semiconductor regions of the first conductivity type formed in the second semiconductor region independently of each other and so as to be exposed on the one main surface of the semiconductor substrate; a first insulated gate electrode formed on the second semiconductor region located between the fifth and first semiconductor regions and exposed on the one main surface; a second insulated gate electrode formed on the first semiconductor region located between the second and third semiconductor regions and exposed on the one main surface; an electrode which shorts the fourth and third semiconductor regions; another electrode which shorts the second and fifth semiconductor regions; and a fu
    Type: Grant
    Filed: December 13, 1988
    Date of Patent: June 19, 1990
    Inventors: Mutsuhiro Mori, Tomoyuki Tanaka, Yasumichi Yasuda
  • Patent number: 4466009
    Abstract: In a light-activated semiconductor device wherein a light-activated semiconductor element accommodated in a package is driven by a light signal fed from an external light source into the package through an optical guide, the optical guide comprises a first portion passing through the package and a second portion for optically coupling the first portion and the light-activated element.
    Type: Grant
    Filed: November 18, 1981
    Date of Patent: August 14, 1984
    Assignee: Hitachi, Ltd.
    Inventors: Nobutake Konishi, Mutsuhiro Mori, Tomoyuki Tanaka