Patents by Inventor Naoto Adachi
Naoto Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180125458Abstract: An ultrasonic image generation system has a probe having an ultrasonic transducer configured to transmit and receive an ultrasonic signal, a processor configured to generate an ultrasonic image signal by processing a received signal of the ultrasonic transducer as well as to generate a drive signal that is supplied to the ultrasonic transducer, and a probe-side wireless communicator; and a terminal having a terminal-side wireless communicator configured to wirelessly communicate with the probe-side wireless communicator, a display configured to display an ultrasonic image based on the ultrasonic image signal, and an operation panel configured to input general measurement information, wherein the probe has a controller configured to determine control information necessary for generation of the drive signal and processing of the received signal from the general measurement information transmitted from the terminal.Type: ApplicationFiled: January 5, 2018Publication date: May 10, 2018Inventors: Hiroaki TAKAGI, Naoto YONEDA, Naoto ADACHI, Masaya TAMAMURA, Amane INOUE
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Publication number: 20180116636Abstract: An ultrasonic image generation system having an ultrasonic unit configured to transmit and receive an ultrasonic signal, a drive control/signal processing unit configured to repeat processing to generate an ultrasonic image signal by processing a received signal of the ultrasonic unit as well as to generate a drive signal that is supplied to the ultrasonic unit; and a display unit configured to repeat displaying an ultrasonic image based on the ultrasonic image signal, to stop updating of a displayed image in response to a stop signal input, and to resume updating of the displayed image in response to a start signal input, wherein the drive control/signal processing unit stops at least part of an operation in response to the stop signal input and resumes the stopped operation in response to the start signal input.Type: ApplicationFiled: January 2, 2018Publication date: May 3, 2018Inventors: Naoto YONEDA, Naoto Adachi, Hiroaki Takagi, Masaya Tamamura, Amane Inoue
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Publication number: 20180042574Abstract: An ultrasonic imaging apparatus includes a plurality of transducers aligned in an array, a select circuit configured to cause transducers selected from the plurality of transducers to transmit an ultrasonic pulse and receive received signals, respectively, and a digital signal processing circuit configured to perform a first operation of adding up an odd number of the received signals, arranged in an order corresponding to the aligned array, with delays that are symmetrical between two sides across a center that is a centrally located signal, and to perform a second operation of adding up an even number of the received signals, arranged in an order corresponding to the aligned array, with delays that are symmetrical between two sides across a center that is situated between two centrally located signals.Type: ApplicationFiled: October 5, 2017Publication date: February 15, 2018Inventor: Naoto ADACHI
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Publication number: 20180035976Abstract: An ultrasonic imaging apparatus includes a plurality of transducers aligned in a line, a select circuit configured to cause transducers selected from the plurality of transducers to transmit an ultrasonic pulse and receive a plurality of received signals, respectively, and a digital signal processing circuit configured to align in time and add up the plurality of received signals weighted by a plurality of respective weighting factors, wherein the digital signal processing circuit changes the plurality of weighting factors according to a time position on the plurality of received signals such that ratios between the plurality of weighting factors change.Type: ApplicationFiled: October 4, 2017Publication date: February 8, 2018Inventor: Naoto ADACHI
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Patent number: 9130593Abstract: A data receiving circuit includes: a first de-interleave circuit configured to de-interleave first data which is demodulated and is soft-decision-processed; a second de-interleave circuit configured to de-interleave second data which is demodulated and is soft-decision-processed; a memory configured to be shared by the first de-interleave circuit and the second de-interleave circuit and store respective hard decision information and respective soft decision information of the first data and the second data; and a memory control circuit configured to vary a first through fourth number of bits stored in the memory, the first number corresponding to the hard decision information of the first data, the second number corresponding to the soft decision information of the first data, the third number corresponding to the hard decision information of the second data, the fourth number corresponding to the soft decision information of the second data.Type: GrantFiled: June 20, 2014Date of Patent: September 8, 2015Assignee: SOCIONEXT INC.Inventor: Naoto Adachi
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Patent number: 9118514Abstract: A receiver includes a detector to detect an interfered-with carrier from a received and demodulated signal, a fast Fourier transform computation part to perform fast Fourier transform to convert a time domain signal to a frequency domain signal and adjust an output power level of a desired carrier wave contained in the frequency domain signal based upon the detected interfered-with carrier, and a channel estimation part to estimate a channel characteristic based upon a non-interfered-with pilot signal that is not subject to influence of the interfered-with carrier and an interpolation value interpolated based upon the non-interfered-with pilot signal, the non-interfered-with pilot signal being obtained by removing, based upon the interfered-with carrier, an interfered-with pilot signal that is subject to the influence of the interfered-with carrier and an interpolation value interpolated based upon the interfered-with pilot signal.Type: GrantFiled: February 18, 2014Date of Patent: August 25, 2015Assignees: FUJITSU LIMITED, SOCIONEXT INC.Inventors: Masataka Umeda, Naoto Adachi
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Patent number: 9065717Abstract: A receiver includes a transformation part configured to convert a time domain received signal to a frequency domain signal, a known signal extraction part configured to extract a known signal from the frequency domain signal, an estimation part configured to estimate a channel characteristic based upon the extracted known signal, a time direction extraction part configured to extract channel characteristic values of a particular carrier in a time direction from the estimated channel characteristic, a power spectrum acquiring part configured to acquire a power spectrum from the channel characteristic values extracted in the time direction, an error calculation part configured to calculate a carrier frequency error from the power spectrum, and a carrier correction part configured to correct for a carrier frequency of the received signal based upon the carrier frequency error.Type: GrantFiled: February 18, 2014Date of Patent: June 23, 2015Assignees: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITEDInventors: Masataka Umeda, Naoto Adachi, Hiroaki Takagi
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Patent number: 9059887Abstract: A receiving device for receiving OFDM signals in which arrangement of pilot signals changes with symbol time, includes: an inverse Fourier transform unit configured to calculate an impulse response by performing an inverse Fourier transform on pilot signals included in a received signal; a first Doppler frequency estimation unit configured to estimate a first Doppler frequency from a phase rotation amount at peak positions between impulse responses of pilot signals of different subcarriers of the impulse responses; a second Doppler frequency estimation unit configured to estimate a second Doppler frequency from a phase rotation amount between impulse responses of pilot signals of the same subcarrier of the impulse responses; and a Doppler frequency selection unit configured to select one of the first and the second Doppler frequency estimated by the first and the second Doppler frequency estimation unit so as to reduce influence of a multipath.Type: GrantFiled: April 25, 2013Date of Patent: June 16, 2015Assignees: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITEDInventors: Masataka Umeda, Naoto Adachi
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Patent number: 9036724Abstract: A data signal correction circuit includes a channel characteristic calculator unit configured to calculate a channel characteristic estimate value of a received data signal on the basis of a pilot signal, a path detector unit configured to determine a delay quantity of multipath propagation of the received data signal on the basis of the calculated channel characteristic estimate value, and an adaptive filter configured to receive the delay quantity and the channel characteristic estimate value as input items, adjust an input interval of the channel characteristic estimate value along a carrier frequency axis in accordance with the delay quantity, and perform adaptive equalization on the channel characteristic estimate value inputted to the adaptive filter at the adjusted input interval.Type: GrantFiled: February 12, 2014Date of Patent: May 19, 2015Assignees: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Hiroaki Takagi, Masataka Umeda, Naoto Adachi
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Publication number: 20140301506Abstract: A data receiving circuit includes: a first de-interleave circuit configured to de-interleave first data which is demodulated and is soft-decision-processed; a second de-interleave circuit configured to de-interleave second data which is demodulated and is soft-decision-processed; a memory configured to be shared by the first de-interleave circuit and the second de-interleave circuit and store respective hard decision information and respective soft decision information of the first data and the second data; and a memory control circuit configured to vary a first through fourth number of bits stored in the memory, the first number corresponding to the hard decision information of the first data, the second number corresponding to the soft decision information of the first data, the third number corresponding to the hard decision information of the second data, the fourth number corresponding to the soft decision information of the second data.Type: ApplicationFiled: June 20, 2014Publication date: October 9, 2014Inventor: Naoto ADACHI
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Publication number: 20140294128Abstract: A receiver includes a transformation part configured to convert a time domain received signal to a frequency domain signal, a known signal extraction part configured to extract a known signal from the frequency domain signal, an estimation part configured to estimate a channel characteristic based upon the extracted known signal, a time direction extraction part configured to extract channel characteristic values of a particular carrier in a time direction from the estimated channel characteristic, a power spectrum acquiring part configured to acquire a power spectrum from the channel characteristic values extracted in the time direction, an error calculation part configured to calculate a carrier frequency error from the power spectrum, and a carrier correction part configured to correct for a carrier frequency of the received signal based upon the carrier frequency error.Type: ApplicationFiled: February 18, 2014Publication date: October 2, 2014Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Masataka UMEDA, Naoto ADACHI, Hiroaki TAKAGI
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Publication number: 20140294130Abstract: A receiver includes a detector to detect an interfered-with carrier from a received and demodulated signal, a fast Fourier transform computation part to perform fast Fourier transform to convert a time domain signal to a frequency domain signal and adjust an output power level of a desired carrier wave contained in the frequency domain signal based upon the detected interfered-with carrier, and a channel estimation part to estimate a channel characteristic based upon a non-interfered-with pilot signal that is not subject to influence of the interfered-with carrier and an interpolation value interpolated based upon the non-interfered-with pilot signal, the non-interfered-with pilot signal being obtained by removing, based upon the interfered-with carrier, an interfered-with pilot signal that is subject to the influence of the interfered-with carrier and an interpolation value interpolated based upon the interfered-with pilot signal.Type: ApplicationFiled: February 18, 2014Publication date: October 2, 2014Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Masataka UMEDA, Naoto ADACHI
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Publication number: 20140270022Abstract: A data signal correction circuit includes a channel characteristic calculator unit configured to calculate a channel characteristic estimate value of a received data signal on the basis of a pilot signal, a path detector unit configured to determine a delay quantity of multipath propagation of the received data signal on the basis of the calculated channel characteristic estimate value, and an adaptive filter configured to receive the delay quantity and the channel characteristic estimate value as input items, adjust an input interval of the channel characteristic estimate value along a carrier frequency axis in accordance with the delay quantity, and perform adaptive equalization on the channel characteristic estimate value inputted to the adaptive filter at the adjusted input interval.Type: ApplicationFiled: February 12, 2014Publication date: September 18, 2014Applicants: FUJITSU LIMITED, FUJITSU SEMICONDUCTOR LIMITEDInventors: Hiroaki TAKAGI, Masataka UMEDA, Naoto ADACHI
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Patent number: 8832533Abstract: A data receiving circuit includes: a first de-interleave circuit configured to de-interleave first data which is demodulated and is soft-decision-processed; a second de-interleave circuit configured to de-interleave second data which is demodulated and is soft-decision-processed; a memory configured to be shared by the first de-interleave circuit and the second de-interleave circuit and store respective hard decision information and respective soft decision information of the first data and the second data; and a memory control circuit configured to vary a first through fourth number of bits stored in the memory, the first number corresponding to the hard decision information of the first data, the second number corresponding to the soft decision information of the first data, the third number corresponding to the hard decision information of the second data, the fourth number corresponding to the soft decision information of the second data.Type: GrantFiled: July 2, 2010Date of Patent: September 9, 2014Assignee: Fujitsu Semiconductor LimitedInventor: Naoto Adachi
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Patent number: 8750433Abstract: A demodulation circuit includes a hard decision process unit and a soft decision process unit. The hard decision process unit is configured to perform a hard decision process using a demodulated signal, and the demodulated signal is a demodulated received signal. The soft decision process unit is configured to determine a range of assignment with respect to a transitioning part in the demodulated signal, calculate a likelihood value of a bit, and perform a soft decision process.Type: GrantFiled: April 9, 2012Date of Patent: June 10, 2014Assignee: Fujitsu LimitedInventors: Naoto Adachi, Masataka Umeda
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Patent number: 8744016Abstract: A receiving apparatus includes a symbol timing detection unit, a Fourier transform unit, a first symbol timing correction unit, and an interpolation synthesis unit. The symbol timing detection unit is configured to detect a Fourier transform start position from a received transmitting signal of a symbol unit, the Fourier transform unit is configured to perform a Fourier transform using the detected Fourier transform start position. The first symbol timing correction unit is configured to calculate and correct an amount of change between the Fourier transform start position of a reference symbol and the detected Fourier transform start position, and the interpolation synthesis unit is configured to perform an interpolation synthesis of a plurality of delay profiles corresponding to a plurality of symbols including the reference symbol and a symbol in which the amount of change is corrected.Type: GrantFiled: April 9, 2012Date of Patent: June 3, 2014Assignees: Fujitsu Limited, Fujitsu Semiconductor LimitedInventors: Hiroaki Takagi, Naoto Adachi, Masataka Umeda
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Publication number: 20130301759Abstract: A receiving device for receiving OFDM signals in which arrangement of pilot signals changes with symbol time, includes: an inverse Fourier transform unit configured to calculate an impulse response by performing an inverse Fourier transform on pilot signals included in a received signal; a first Doppler frequency estimation unit configured to estimate a first Doppler frequency from a phase rotation amount at peak positions between impulse responses of pilot signals of different subcarriers of the impulse responses; a second Doppler frequency estimation unit configured to estimate a second Doppler frequency from a phase rotation amount between impulse responses of pilot signals of the same subcarrier of the impulse responses; and a Doppler frequency selection unit configured to select one of the first and the second Doppler frequency estimated by the first and the second Doppler frequency estimation unit so as to reduce influence of a multipath.Type: ApplicationFiled: April 25, 2013Publication date: November 14, 2013Applicants: FUJTISU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Masataka Umeda, Naoto Adachi
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Patent number: 8363539Abstract: An FFT unit generates a frequency domain signal by converting an OFDM signal using Fourier transform. A delay amount calculation unit generates a delay profile of the OFDM signal. The control determination unit detects a main wave and an interference wave using the delay profile. When the time difference between the main wave and a preceding wave is larger than a guard interval of the OFDM signal, an FFT window control unit sets the start position of the FFT window at a position shifted forward from the symbol start position of the main wave by an amount corresponding to the guard interval.Type: GrantFiled: December 30, 2008Date of Patent: January 29, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Naoto Adachi
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Patent number: 8358710Abstract: An OFDM receiver according to the present invention judges whether or not a delay amount (i.e., a first delay amount) of a transmission path detected from scattered pilot information existing in an OFDM signal of a frequency domain by referring to peak position information obtainable from OFDM signals of the preceding and following symbols, calculates another delay amount (i.e., a second delay amount) from the delay amount (i.e., the first delay amount) if the aforementioned delay amount is judged to be inappropriate, and set a position of a time window by using the calculated delay amount.Type: GrantFiled: October 31, 2006Date of Patent: January 22, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Naoto Adachi
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Publication number: 20120307944Abstract: A receiving apparatus includes a symbol timing detection unit, a Fourier transform unit, a first symbol timing correction unit, and an interpolation synthesis unit. The symbol timing detection unit is configured to detect a Fourier transform start position from a received transmitting signal of a symbol unit, the Fourier transform unit is configured to perform a Fourier transform using the detected Fourier transform start position. The first symbol timing correction unit is configured to calculate and correct an amount of change between the Fourier transform start position of a reference symbol and the detected Fourier transform start position, and the interpolation synthesis unit is configured to perform an interpolation synthesis of a plurality of delay profiles corresponding to a plurality of symbols including the reference symbol and a symbol in which the amount of change is corrected.Type: ApplicationFiled: April 9, 2012Publication date: December 6, 2012Applicants: FUJITSU SEMICONDUCTOR LIMITED, FUJITSU LIMITEDInventors: Hiroaki TAKAGI, Naoto ADACHI, Masataka Umeda