Patents by Inventor Ning Qu

Ning Qu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9263597
    Abstract: A semiconductor assemblage of a super-trench Schottky barrier diode (STSBD) made up of an n+ substrate, an n-epilayer, trenches etched into the n-epilayer that have a width and a distance from the n+ substrate, mesa regions between the adjacent trenches having a width, a metal layer on the front side of the chip that is a Schottky contact and serves as an anode electrode, and a metal layer on the back side of the chip that is an ohmic contact and serves as a cathode electrode, wherein multiple Schottky contacts having a width or distance and a distance between the Schottky contacts, and between the Schottky contact as anode electrode and the first Schottky contact, are located on the trench wall.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: February 16, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 9263599
    Abstract: A semiconductor system having a trench MOS barrier Schottky diode is described, including an n-type epitaxial layer, in which at least two etched trenches are located in a two-dimensional manner of presentation on an n+-type substrate which acts as the cathode zone. An electrically floating, p-type layer, which acts as the anode zone of the p-n type diode, is located in the n-type epitaxial layer, at least in a location below the trench bottom. An oxide layer is located between a metal layer and the surface of the trenches. The n-type epitaxial layer may include two n-type layers of different doping concentrations.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: February 16, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 9263515
    Abstract: A semiconductor chip has an n+-doped substrate, above which an n-doped epilayer having trenches is introduced, the trenches being filled with p-doped semiconductor material and in each case having a highly p-doped region at their top side, such that an alternating arrangement of n-doped regions having a first width and p-doped regions having a second width is present. A first metal layer functioning as an anode is provided on the front side of the chip and forms a Schottky contact with the n-doped epilayer and forms an ohmic contact with the highly p-doped regions. A second metal layer which represents an ohmic contact and functioning as a cathode is formed on the rear side of the semiconductor chip. A dielectric layer is provided between each n-doped region and an adjacent p-doped region.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: February 16, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 9142552
    Abstract: A semiconductor array is described whose breakdown voltage has only a very low temperature coefficient or none at all and therefore there is little or no temperature-dependent voltage rise. The voltage limitation is achieved by a punch-through effect.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: September 22, 2015
    Assignee: ROBERT BOSCH GMBH
    Inventors: Alfred Goerlach, Ning Qu
  • Patent number: 9082628
    Abstract: A trench Schottky diode is described, which has a highly doped substrate of a first conductivity type and an epitaxial layer of the same conductivity type that is applied to the substrate. At least two trenches are introduced into the epitaxial layer. The epitaxial layer is a stepped epitaxial layer that has two partial layers of different doping concentrations.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: July 14, 2015
    Assignee: ROBERT BOSCH GMBH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 9006858
    Abstract: In a Schottky diode having an n+-type substrate, an n-type epitaxial layer, at least two p-doped trenches introduced into the n-type epitaxial layer, mesa regions between adjacent trenches, a metal layer functioning as a cathode electrode, and another metal layer functioning as an anode electrode, the thickness of the epitaxial layer is more than four times the depth of the trenches.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: April 14, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Ning Qu, Alfred Goerlach
  • Publication number: 20150091125
    Abstract: A semiconductor array is described whose breakdown voltage has only a very low temperature coefficient or none at all and therefore there is little or no temperature-dependent voltage rise. The voltage limitation is achieved by a punch-through effect.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 2, 2015
    Applicant: ROBERT BOSCH GMBH
    Inventors: Alfred GOERLACH, Ning Qu
  • Publication number: 20150041830
    Abstract: A semiconductor system of a Schottky diode is described having an integrated PN diode as a clamping element, which is suitable in particular as a Zener diode having a breakdown voltage of approximately 20 V for use in motor vehicle generator systems. The semiconductor system of the Schottky diode includes a combination of a Schottky diode and a PN diode. The breakdown voltage of the PN diode is much lower than the breakdown voltage of the Schottky diode, the semiconductor system being able to be operated using high currents during breakdown operation.
    Type: Application
    Filed: October 24, 2014
    Publication date: February 12, 2015
    Inventors: Ning QU, Alfred GOERLACH
  • Publication number: 20150028445
    Abstract: In a Schottky diode having an n+-type substrate, an n-type epitaxial layer, at least two p-doped trenches introduced into the n-type epitaxial layer, mesa regions between adjacent trenches, a metal layer functioning as a cathode electrode, and another metal layer functioning as an anode electrode, the thickness of the epitaxial layer is more than four times the depth of the trenches.
    Type: Application
    Filed: November 12, 2012
    Publication date: January 29, 2015
    Inventors: Ning Qu, Alfred Goerlach
  • Publication number: 20140287076
    Abstract: A fatty acid composition containing linoleic acid, linolenic acid and oleic acid is provided. Also provided is a fatty acid composition containing linoleic acid, linolenic acid and oleic acid, and at least one selected from palmitinic acid, palmitoleic acid, stearic acid, arachidic acid and docosanoic acid. A plant extract and a pharmaceutical preparation are provided, wherein the pharmaceutical preparation contains an active component including at least one of the fatty acid composition, the plant extract and modified products thereof. Also provided is an application of the fatty acid composition, the plant extract and the pharmaceutical preparation in multiple fields. The pharmaceutical preparation may function to repair various wounds and traumas in skin, mucosa, lumina and muscular tissues.
    Type: Application
    Filed: June 25, 2012
    Publication date: September 25, 2014
    Inventors: Junwu Xing, Ning Qu, Yiqian Xing
  • Patent number: 8836072
    Abstract: A semiconductor system is described, which includes a trench junction barrier Schottky diode having an integrated p-n type diode as a clamping element, which is suitable for use in motor vehicle generator system, in particular as a Zener diode having a breakdown voltage of approximately 20V. In this case, the TJBS is a combination of a Schottky diode and a p-n type diode. Where the breakdown voltages are concerned, the breakdown voltage of the p-n type diode is lower than the breakdown voltage of Schottky diode. The semiconductor system may therefore be operated using high currents at breakdown.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: September 16, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 8832778
    Abstract: An apparatus and method for establishing a trusted path between a user interface and a trusted executable, wherein the trusted path includes a hypervisor and a driver shim. The method includes measuring an identity of the hypervisor; comparing the measurement of the identity of the hypervisor with a policy for the hypervisor; measuring an identity of the driver shim; comparing the measurement of the identity of the driver shim with a policy for the driver shim; measuring an identity of the user interface; comparing the measurement of the identity of the user interface with a policy for the user interface; and providing a human-perceptible indication of whether the identity of the hypervisor, the identity of the driver shim, and the identity of the user interface correspond with the policy for the hypervisor, the policy for the driver shim, and the policy for the user interface, respectively.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: September 9, 2014
    Assignee: Carnegie Mellon University
    Inventors: Jonathan M. McCune, Adrian M. Perrig, Anupam Datta, Virgil D. Gligor, Ning Qu
  • Publication number: 20140239435
    Abstract: A semiconductor chip has an n+-doped substrate, above which an n-doped epilayer having trenches is introduced, the trenches being filled with p-doped semiconductor material and in each case having a highly p-doped region at their top side, such that an alternating arrangement of n-doped regions having a first width and p-doped regions having a second width is present. A first metal layer functioning as an anode is provided on the front side of the chip and forms a Schottky contact with the n-doped epilayer and forms an ohmic contact with the highly p-doped regions. A second metal layer which represents an ohmic contact and functioning as a cathode is formed on the rear side of the semiconductor chip. A dielectric layer is provided between each n-doped region and an adjacent p-doped region.
    Type: Application
    Filed: July 19, 2012
    Publication date: August 28, 2014
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 8816467
    Abstract: A semiconductor device including a Schottky diode of the trench-junction-barrier type having an integrated PN diode, and a corresponding method for manufacturing the device, are provided. An n layer is provided on an nt substrate, and trenches are provided in the n layer. The trenches are provided with p-doped regions. The nt substrate and the n layer carry a contact layer.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: August 26, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Alfred Goerlach, Ning Qu
  • Patent number: 8816466
    Abstract: A protective element for electronics has at least one Schottky diode and at least one Zener diode which are located between a power supply and the electronics, the anode of the Schottky diode being connected to the power supply and the cathode of the Schottky diode being connected to the electronics, and the cathode and the anode of the Zener diode are connected to ground. The Schottky diode is a trench MOS barrier junction diode or trench MOS barrier Schottky (TMBS) diode or a trench junction barrier Schottky (TJBS) diode and includes an integrated semiconductor arrangement, which has at least one trench MOS barrier Schottky diode and a p-doped substrate, which is used as the anode of the Zener diode.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: August 26, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 8759888
    Abstract: A Schottky diode includes an n+-substrate, an n-epilayer, trenches introduced into the n-epilayer, floating Schottky contacts being located on their side walls and on the entire trench bottom, mesa regions between the adjacent trenches, a metal layer on its back face, this metal layer being used as a cathode electrode, and an anode electrode on the front face of the Schottky diode having two metal layers, the first metal layer of which forms a Schottky contact and the second metal layer of which is situated below the first metal layer and also forms a Schottky contact. Preferably, these two Schottky contacts have different barrier heights.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: June 24, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Ning Qu, Alfred Goerlach
  • Publication number: 20140035090
    Abstract: A trench Schottky diode is described, which has a highly doped substrate of a first conductivity type and an epitaxial layer of the same conductivity type that is applied to the substrate. At least two trenches are introduced into the epitaxial layer. The epitaxial layer is a stepped epitaxial layer that has two partial layers of different doping concentrations.
    Type: Application
    Filed: December 14, 2011
    Publication date: February 6, 2014
    Inventors: Ning Qu, Alfred Goerlach
  • Publication number: 20140021509
    Abstract: A semiconductor configuration, which includes an epitaxial layer of the first conductivity type disposed on a highly doped substrate of first conductivity type; a layer of a second conductivity type introduced into the epitaxial layer; and a highly doped layer of the second conductivity type provided at the surface of the layer of the second conductivity type. Between the layer of the second conductivity type and the highly doped substrate of the first conductivity type, a plurality of Schottky contacts, which are in the floating state, are provided mutually in parallel in the area of the epitaxial layer.
    Type: Application
    Filed: December 2, 2011
    Publication date: January 23, 2014
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 8627414
    Abstract: A computer including a processor and a verification device. The processor in the computer performs the steps of authenticating a secure connection between a hypervisor and the verification device, measuring the identity of at least a portion of a select guest before the select guest executes any instruction, and sending a measurement of the identity of the select guest to the verification device. The verification device compares the policy stored in the verification device with the measurement of the select guest received by the verification device. The steps of authenticating, measuring, sending, and comparing are performed after receiving a signal indicative of a request to execute the select guest and without rebooting the computer.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: January 7, 2014
    Assignee: Carnegie Mellon University
    Inventors: Jonathan M. McCune, Adrian M. Perrig, Anupam Datta, Virgil Dorin Gligor, Yanlin Li, Bryan Jeffrey Parno, Amit Vasudevan, Ning Qu
  • Publication number: 20140001593
    Abstract: A semiconductor assemblage of a super-trench Schottky barrier diode (STSBD) made up of an n+ substrate, an n-epilayer, trenches etched into the n-epilayer that have a width and a distance from the n+ substrate, mesa regions between the adjacent trenches having a width, a metal layer on the front side of the chip that is a Schottky contact and serves as an anode electrode, and a metal layer on the back side of the chip that is an ohmic contact and serves as a cathode electrode, wherein multiple Schottky contacts having a width or distance and a distance between the Schottky contacts, and between the Schottky contact as anode electrode and the first Schottky contact, are located on the trench wall.
    Type: Application
    Filed: September 9, 2011
    Publication date: January 2, 2014
    Inventors: Ning QU, Alfred Goerlach