Patents by Inventor Nir Jacob Wakrat

Nir Jacob Wakrat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10359949
    Abstract: Systems and methods are provided for obtaining and using nonvolatile memory (“NVM”) health information. Health information can include a variety of information associated with the performance and reliability of portions of an NVM device, such as the number of errors detected in a portion of NVM or the amount of time required to read from or program a portion of nonvolatile memory. During operation, address specific health information may be stored passively on a host device and provided as part of a command to a memory controller. The memory controller may extract the health information from the command and use the information to execute access requests. After an access request is completed, the memory controller can update the health information and transmit the information back to the host device.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: July 23, 2019
    Assignee: Apple Inc.
    Inventors: Nicholas Seroff, Anthony Fai, Nir Jacob Wakrat
  • Patent number: 9996457
    Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: June 12, 2018
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir Jacob Wakrat
  • Patent number: 9841917
    Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: December 12, 2017
    Assignee: APPLE INC.
    Inventors: Vadim Khmelnitsky, Daniel J. Post, Nir Jacob Wakrat, Matthew J. Byom, Kenneth L. Herman, Alexander C. Sanks
  • Publication number: 20170286290
    Abstract: Systems and methods are disclosed for efficient buffering for a system having non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 5, 2017
    Inventors: Daniel J. Post, Nir Jacob Wakrat
  • Patent number: 9690953
    Abstract: Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory (“NVM”). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: June 27, 2017
    Assignee: APPLE INC.
    Inventors: Andrew W. Vogan, Matthew J. Byom, Alexander C. Sanks, Daniel J. Post, Hari Hara Kumar Maharaj, Nir Jacob Wakrat, Kenneth L. Herman
  • Publication number: 20170102899
    Abstract: Systems and methods are disclosed for partitioning data for storage in a non-volatile memory (“NVM”), such as flash memory. In some embodiments, a priority may be assigned to data being stored, and the data may be logically partitioned based on the priority. For example, a file system may identify a logical address within a first predetermined range for higher priority data and within a second predetermined range for lower priority data, such using a union file system. Using the logical address, a NVM driver can determine the priority of data being stored and can process (e.g., encode) the data based on the priority. The NVM driver can store an identifier in the NVM along with the data, and the identifier can indicate the processing techniques used on the associated data.
    Type: Application
    Filed: December 20, 2016
    Publication date: April 13, 2017
    Inventors: Daniel J. Post, Matthew J. Byom, Vadim Khmelnitsky, Nir Jacob Wakrat, Kenneth L. Herman
  • Patent number: 9477590
    Abstract: Systems and methods are disclosed for providing a weave sequence counter (“WSC”) for non-volatile memory (“NVM”) systems. The WSC can identify the sequence in which each page of the NVM is programmed. The “weave” aspect can refer to the fact that multiple blocks can be open for programming at once, thus allowing the pages of these blocks to be programmed in a “woven” manner. Systems and methods are also disclosed for providing a host weave sequence counter (“HWSC”). Each time new data is initially programmed to the NVM, this data can be associated with a particular HWSC. The HWSC associated with the data may not change, even when the data is moved to a new page (e.g., for wear leveling purposes and the like). The WSC and HWSC may aid in, for example, performing rollback, building logical-to-physical mappings, determining static-versus-dynamic page statuses, and performing maintenance operations (e.g., wear leveling).
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: October 25, 2016
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir Jacob Wakrat, Vadim Khmelnitsky
  • Patent number: 9477596
    Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: October 25, 2016
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir Jacob Wakrat, Vadim Khmelnitsky
  • Patent number: 9342449
    Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.
    Type: Grant
    Filed: June 22, 2015
    Date of Patent: May 17, 2016
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Vadim Khmelnitsky, Nir Jacob Wakrat
  • Publication number: 20160092110
    Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Vadim Khmelnitsky, Daniel J. Post, Nir Jacob Wakrat, Matthew J. Byom, Kenneth L. Herman, Alexander C. Sanks
  • Patent number: 9235502
    Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: January 12, 2016
    Assignee: APPLE INC.
    Inventors: Vadim Khmelnitsky, Daniel J. Post, Nir Jacob Wakrat, Matthew J. Byom, Kenneth Herman, Alexander Sanks
  • Patent number: 9189386
    Abstract: Systems and methods are provided for dynamically allocating a number of bits per cell to memory locations of a non-volatile memory (“NVM”) device. In some embodiments, a host may determine whether to store data in the NVM device using SLC programming or MLC programming operations. The host may allocate an erased block as an SLC block or MLC block based on this determination regardless of whether the erased block was previously used as an SLC block, MLC block, or both. In some embodiments, to dynamically allocate a memory location as SLC or MLC, the host may provide an address vector to the NVM package, where the address vector may specify the memory location and the number of bits per cell to use for that memory location.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 17, 2015
    Assignee: APPLE INC.
    Inventors: Nir Jacob Wakrat, Tahoma M. Toelkes
  • Publication number: 20150309928
    Abstract: Systems and methods are provided for storing data to or reading data from a non-volatile memory (“NVM”), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.
    Type: Application
    Filed: June 22, 2015
    Publication date: October 29, 2015
    Inventors: Daniel J. Post, Vadim Khmelnitsky, Nir Jacob Wakrat
  • Publication number: 20150301938
    Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.
    Type: Application
    Filed: June 29, 2015
    Publication date: October 22, 2015
    Inventors: Daniel J. Post, Nir Jacob Wakrat, Vadim Khmelnitsky
  • Patent number: 9164680
    Abstract: Systems and methods are provided for improved communications in a nonvolatile memory (“NVM”) system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one or more memory controllers of the system, and the memory controllers can toggle between multiple communications channels that extend to the NVM dies. Power islands may be incorporated into the system to electrically isolate system components associated with inactive communications channels.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: October 20, 2015
    Assignee: Apple Inc.
    Inventors: Nicholas C. Seroff, Anthony Fai, Nir Jacob Wakrat
  • Patent number: 9158608
    Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: October 13, 2015
    Assignee: Apple Inc.
    Inventors: Michael J. Cornwell, Christopher P. Dudte, Nir Jacob Wakrat
  • Patent number: 9110787
    Abstract: Systems and processes may use a host and an external host. The host may be a portable device that includes a memory, a memory controller, and a communication interface for communication with the external host. The portable device may receive a command signal from the external host and initiate a predetermined amount of wear leveling in response to the command signal.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: August 18, 2015
    Assignee: Apple Inc.
    Inventors: Michael J. Cornwell, Christopher P. Dudte, Nir Jacob Wakrat
  • Patent number: 9104329
    Abstract: Systems and methods are disclosed for mount-time reconciliation of data availability. During system boot-up, a non-volatile memory (“NVM”) driver can be enumerated, and an NVM driver mapping can be obtained. The NVM driver mapping can include the actual availability of LBAs in the NVM. A file system can then be mounted, and a file system allocation state can be generated. The file system allocation state can indicate the file system's view of the availability of LBAs. Subsequently, data availability reconciliation can be performed. That is, the file system allocation state and the NVM driver mapping can be overlaid and compared with one another in order to expose any discrepancies.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: August 11, 2015
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir Jacob Wakrat, Vadim Khmelnitsky
  • Patent number: 9069657
    Abstract: Systems and methods are disclosed for logical block address (“LBA) bitmap usage for a system having non-volatile memory (“NVM”). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: June 30, 2015
    Assignee: APPLE INC.
    Inventors: Daniel J. Post, Nir Jacob Wakrat, Vadim Khmelnitsky
  • Patent number: 9069660
    Abstract: Systems and methods for writing to high-capacity memory are disclosed. In high-capacity memory systems in which the capacity of the characteristic portion of the memory (e.g., a page of NAND flash memory) exceeds the capacity of a buffer used to write to the memory, underutilization issues are prevalent. Data organized in the buffer can be combined with additional data to improve utilization of the characteristic portion. According to various embodiments, the additional data can include duplicate copies of the data, whitened data, or any other suitable type of data.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 30, 2015
    Assignee: APPLE INC.
    Inventors: Nir Jacob Wakrat, Matthew J. Byom