Abstract: In a memory system, a host controller is coupled to a non-volatile memory (NVM) package (e.g., NAND device). The host controller sends a read command to the NVM package requesting a low latency read operation. Responsive to the read command, a controller in the NVM package retrieves the data and sends the data to an ECC engine for correcting. Following the read command, the host controller sends a read status request command to the controller in the NVM package. Responsive to the read status request, the controller sends a status report to the host controller indicating that some or all of the data is available for transfer to the host controller. Responsive to the report, the host controller transfers the data. An underrun status can be determined to indicate that uncorrected data had been transferred to the host controller.

Abstract: Multipage preparation commands for non-volatile memory systems are disclosed. The multipage preparation commands supply data that can be used to prepare a non-volatile memory device for forthcoming multipage program operations. A host controller can use the commands ahead of a multipage program operation to optimize usage of a multipage program command. The non-volatile memory device can use the commands to configure the non-volatile memory in preparation for a subsequent operation, such as changing a command order or using the most optimized command set for the subsequent operation.

Abstract: The disclosed architecture uses address mapping to map a block address on a host interface to an internal block address of a non-volatile memory (NVM) device. The block address is mapped to an internal chip select for selecting a Concurrently Addressable Unit (CAU) identified by the block address. The disclosed architecture supports generic NVM commands for read, write, erase and get status operations. The architecture also supports an extended command set for supporting read and write operations that leverage a multiple CAU architecture.

Abstract: In a memory system, content in a defined “risk zone” of non-volatile memory is copied into volatile memory. When a write failure occurs on non-volatile memory, the risk zone is scanned sequentially to determine corrupted content. The corrupted content is restored by writing the corresponding content previously copied to volatile memory to new blocks in non-volatile memory.

Abstract: In a copyback or read operation for a non-volatile memory subsystem, data page change indicators are used to manage transfers of data pages between a register in non-volatile memory and a controller that is external to the non-volatile memory.

Abstract: A host device coupled to a managed memory device (e.g., a managed NAND device) generates a signal indicative of an expected power event. The signal is received by the managed memory device which performs one or more operations in response to the signal. In some implementations, a pin is added to a power management chip that provides a signal to interrupt the managed memory device when a power event (e.g., power failure, system reset) is expected to occur. The signal provides the managed memory device time to finish one or more operations (e.g., the last physical operation) and to place the managed memory device in a known and/or safe state prior to the occurrence of the power event.

Abstract: Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the physical address of the first lookup table in non-volatile memory. In some implementations, a cache in volatile memory holds the physical addresses of the most recently written logical sectors. Also disclosed is a block TOC describing block content which can be used for garbage collection and restore operations.

Abstract: Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the physical address of the first lookup table in non-volatile memory. In some implementations, a cache in volatile memory holds the physical addresses of the most recently written logical sectors. Also disclosed is a block TOC describing block content which can be used for garbage collection and restore operations.

Abstract: Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the physical address of the first lookup table in non-volatile memory. In some implementations, a cache in volatile memory holds the physical addresses of the most recently written logical sectors. Also disclosed is a block TOC describing block content which can be used for garbage collection and restore operations.

Abstract: In a managed memory subsystem, information associated with the memory subsystem is copied from volatile memory in the memory subsystem to host system memory. The copying can be over a standard interface. Responsive to memory subsystem power up from a powered down state or power loss, the information is copied from the host system memory back to the volatile memory in the memory subsystem, where the information can be used by the memory subsystem to perform memory operations. Transferring information from host system memory to volatile memory in a memory subsystem is faster and more power efficient than transferring the same information from non-volatile memory to volatile memory in the memory subsystem.

Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.