Abstract: A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film.

Abstract: In one aspect of the present invention, a semiconductor device may include a first semiconductor layer of a first conductivity type and having a main surface that has a first plane orientation, a second semiconductor layer of the first conductivity type and having a main surface that has a second plane orientation different from the first plane orientation, the second semiconductor layer being directly provided on the first semiconductor layer, a third semiconductor layer having a main surface that has the first plane orientation, and being formed on the first semiconductor layer and on a side face of the second semiconductor layer, a gate electrode formed on the second semiconductor layer via a gate insulating film, first impurity diffusion regions of a second conductivity type, and being formed in the second semiconductor layer so that the gate electrode is located on a region sandwiched in a gate length direction between the first impurity diffusion regions, the first impurity diffusion regions extending t

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive line, a second conductive line, a rectifying element, a switching element, a first side wall film and a second side wall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The rectifying element is connected between the first and second conductive lines. The switching element is connected in series with the rectifying element between the first and second conductive lines. The first side wall film is formed on a side surface of the rectifying element. The second side wall film is formed on a side surface of at least one of the first and second conductive lines. At least one of a film type and a film thickness of the second side wall film is different from that of the first side wall film.

Abstract: According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, a cell unit which is provided at the intersection of the first interconnect line and the second interconnect line and which includes a memory element and a non-ohmic element that are connected in series. The non-ohmic element has a first semiconductor layer which includes at least one diffusion buffering region and a conductive layer adjacent to the first semiconductor layer. The diffusion buffering region is different in crystal structure from a semiconductor region except for the diffusion buffering region in the first semiconductor layer.

Abstract: According to one embodiment, a semiconductor memory device includes a first conductive line, a second conductive line, a cell unit, a silicon nitride film, and an insulating film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The cell unit includes a phase-change film and a diode including a p-type semiconductor layer and an n-type semiconductor layer. The cell unit is connected in series between the first conductive line and the second conductive line. The silicon nitride film is formed on a side surface of the phase-change film. The insulating film is formed on a side surface of the diode and has a smaller amount of charge trapping than the silicon nitride film.

Abstract: A semiconductor memory device includes a first conductive line, a second conductive line, a cell unit, a silicon nitride film and a double-sidewall film. The first conductive line extends in a first direction. The second conductive line extends in a second direction crossing the first direction. The cell unit includes a phase-change film and a rectifier element connected in series with each other between the first conductive line and the second conductive line. The silicon nitride film is formed on a side surface of the phase-change film. The double-sidewall film includes a silicon oxide film and the silicon nitride film formed on a side surface of the rectifier element.

Abstract: According to one embodiment, a resistance change memory includes a first interconnect extending in a first direction, a second interconnect extending in a second direction intersecting with the first direction, and a cell unit which is provided between the first interconnect and the second interconnect. The cell unit includes a non-ohmic element and a memory element. The non-ohmic element includes a first silicon layer of an n-conductivity type and a conducting layer in contact with a first face of the first silicon layer. The memory element stores data according to a reversible change of a resistance state. The first silicon layer includes a first element and a second element as donor.

Abstract: A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of the gate electrode, contains silicon germanium, and has a germanium layer in a surface layer portion. The germanide layer is formed on the germanium layer of the source/drain layer.

Abstract: A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectification connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a value of voltage which is applied to the memory element to change a resistance of the memory element reversibly between first and second values. The rectification includes a p-type semiconductor layer, an n-type semiconductor layer and an intrinsic semiconductor layer therebetween. The rectification has a first diffusion prevention area in the intrinsic semiconductor layer.

Abstract: A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of the gate electrode, contains silicon germanium, and has a germanium layer in a surface layer portion. The germanide layer is formed on the germanium layer of the source/drain layer.

Abstract: In one aspect of the present invention, a semiconductor device may include a gate electrode formed on a gate insulation film on a main surface of a semiconductor substrate of a first conductivity type; source/drain regions formed to sandwich a channel region formed below the gate electrode, the source/drain regions having a structure in which a first semiconductor layer and a second semiconductor layer are stacked in this order, the first semiconductor layer containing a first element and an impurity of a second conductivity type that are forgiving strain to the channel region, and containing a second element that is for suppressing a diffusion of the impurity of the second conductivity type, the second semiconductor layer containing the first element and the impurity of the second conductivity type; and source/drain extension regions adjacent to the channel region, the extension regions extending respectively from the second semiconductor layers.

Abstract: A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film.

Abstract: In one aspect of the present invention, a semiconductor device may include a first semiconductor layer of a first conductivity type and having a main surface that has a first plane orientation, a second semiconductor layer of the first conductivity type and having a main surface that has a second plane orientation different from the first plane orientation, the second semiconductor layer being directly provided on the first semiconductor layer, a third semiconductor layer having a main surface that has the first plane orientation, and being formed on the first semiconductor layer and on a side face of the second semiconductor layer, a gate electrode formed on the second semiconductor layer via a gate insulating film, first impurity diffusion regions of a second conductivity type, and being formed in the second semiconductor layer so that the gate electrode is located on a region sandwiched in a gate length direction between the first impurity diffusion regions, the first impurity diffusion regions extending t

Abstract: A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film.

Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.

Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.

Abstract: In one aspect of the present invention, a semiconductor device may include an isolation region provided in a semiconductor substrate and defining an active region, a gate electrode provided on the semiconductor substrate via a gate dielectric layer in the active region, a channel region provided below the gate electrode, a strain supplying layer provided between the channel region and the isolation region and being epitaxially grown, and configured to generate a strain in the channel region, a silicide layer provided on the strain supplying layer, a reformed layer provided between the silicide layer and the semiconductor substrate near the isolation region, and provided under the strain supplying layer, a source/drain region provided in a part of the strain supplying layer and a part of the reformed layer.

Abstract: A semiconductor device, which can use silicon-germanium for a source/drain extension of pMOS, form a silicide layer on the source/drain, and realize a high-speed operation, is provided by comprising a gate electrode formed in a first conductive type region of a semiconductor substrate via an insulator, a first sidewall formed on a side face of the gate electrode, a second sidewall formed on a side face of the first sidewall, a semiconductor layer formed below the second sidewall, including a first impurity layer of a second conductive type and containing germanium, a second impurity layer formed in a region outside the second sidewall and containing impurities of the second conductive type with a higher concentration than those in the first impurity layer, and a silicide layer formed on the second impurity layer.

Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.

Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.