Patents by Inventor Nobuaki Yasutake

Nobuaki Yasutake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070228417
    Abstract: A semiconductor device according to an embodiment of the present invention includes: a semiconductor substrate; a gate electrode formed on the semiconductor substrate through a gate insulating film; a source/drain region formed apart from the gate electrode; and a source/drain extension region formed between the gate electrode and the source/drain region so as to be shallower than the source/drain region; in which a buried film made of a crystal having a lattice constant different from that of an Si crystal is buried in at least a part of the source/drain region and the source/drain extension region.
    Type: Application
    Filed: March 22, 2007
    Publication date: October 4, 2007
    Inventor: Nobuaki Yasutake
  • Publication number: 20070187767
    Abstract: A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of the gate electrode, contains silicon germanium, and has a germanium layer in a surface layer portion. The germanide layer is formed on the germanium layer of the source/drain layer.
    Type: Application
    Filed: February 9, 2007
    Publication date: August 16, 2007
    Inventor: Nobuaki Yasutake
  • Patent number: 7244988
    Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: July 17, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nobuaki Yasutake
  • Publication number: 20060270133
    Abstract: A semiconductor device, which can use silicon-germanium for a source/drain extension of pMOS, form a silicide layer on the source/drain, and realize a high-speed operation, is provided by comprising a gate electrode formed in a first conductive type region of a semiconductor substrate via an insulator, a first sidewall formed on a side face of the gate electrode, a second sidewall formed on a side face of the first sidewall, a semiconductor layer formed below the second sidewall, including a first impurity layer of a second conductive type and containing germanium, a second impurity layer formed in a region outside the second sidewall and containing impurities of the second conductive type with a higher concentration than those in the first impurity layer, and a silicide layer formed on the second impurity layer.
    Type: Application
    Filed: August 9, 2005
    Publication date: November 30, 2006
    Inventor: Nobuaki Yasutake
  • Publication number: 20060057828
    Abstract: A method of manufacturing a semiconductor device is disclosed which comprises forming a gate structure on a major surface of a semiconductor substrate with a gate insulating film interposed therebetween, forming a first insulating film to cover top and side surfaces of the gate structure and the major surface of the semiconductor substrate, reforming portions of the first insulating film which cover the top surface of the gate structure and the major surface of the semiconductor substrate by an anisotropic plasma process using a gas not containing fluorine, and removing the reformed portions of the first insulating film.
    Type: Application
    Filed: September 8, 2005
    Publication date: March 16, 2006
    Inventors: Mitsuhiro Omura, Nobuaki Yasutake
  • Publication number: 20050170597
    Abstract: A semiconductor apparatus is disclosed. The semiconductor apparatus comprises a gate electrode formed on a surface of a semiconductor substrate with a gate insulating film provided therebetween. The semiconductor apparatus further comprises a gate sidewall insulating film having a three-layered structure formed of a first nitride film, an oxide film, and a second nitride film, which are formed on a sidewall of an upper portion of the gate electrode, and a gate sidewall insulating film having a two-layered structure formed of the oxide film and the second nitride film, which are formed on a sidewall of a lower portion of the gate electrode. The semiconductor apparatus further comprises a raised source/drain region formed of an impurity region formed in a surface layer of the semiconductor substrate and an impurity region grown on the impurity region.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 4, 2005
    Inventor: Nobuaki Yasutake