Patents by Inventor Patrick L. Connor

Patrick L. Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180278530
    Abstract: Embodiments regard load balancing data on one or more network ports. A device may include processing circuitry, the processing circuitry to transmit a first packet of a first series of packets to a destination device via a first port, determine a time gap between a first packet and a second packet of the first series of packets, and in response to a determination that the time gap is greater than a time threshold, transmit the second packet to the destination device via a second port.
    Type: Application
    Filed: March 24, 2017
    Publication date: September 27, 2018
    Inventors: Patrick L. Connor, Parthasarathy Sarangam
  • Patent number: 9942631
    Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: April 10, 2018
    Assignee: Intel Corporation
    Inventors: Andrew J Herdrich, Patrick L. Connor, Dinesh Kumar, Alexander W Min, Daniel J. Dahle, Kapil Sood, Jeffrey B Shaw, Edwin Verplanke, Scott P. Dubal, James Robert Hearn
  • Patent number: 9847936
    Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: December 19, 2017
    Assignee: Intel Corporation
    Inventors: Nrupal Jani, Dinesh Kumar, Christian Maciocco, Ren Wang, Neerav Parikh, John Fastabend, Iosif Gasparakis, David J. Harriman, Patrick L. Connor, Sanjeev Jain
  • Publication number: 20170285646
    Abstract: Various systems and methods for providing a vehicle control system are described herein. A system for managing a vehicle comprises: a vehicle control system of a vehicle having access to a network, including: a communication module to interface with at least one of: a mobile device, the vehicle, and environmental sensors coupled to the vehicle; and a configuration module to identify a mitigation operation to be taken when predetermined factors exist; wherein the vehicle control system is to identify a potential obstacle in a travel route of the vehicle and initiate a mitigation operation at the vehicle.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Inventor: Patrick L. Connor
  • Publication number: 20170094377
    Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 30, 2017
    Inventors: Andrew J. Herdrich, Patrick L. Connor, Dinesh Kumar, Alexander W. Min, Daniel J. Dahle, Kapil Sood, Jeffrey A. Shaw, Edwin Verplanke, Scott P. Dubal, James R. Hearn
  • Publication number: 20160380885
    Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 29, 2016
    Inventors: Nrupal Jani, Dinesh Kumar, Christian Maciocco, Ren Wang, Neerav Parikh, John Fastabend, Iosif Gasparakis, David J. Harriman, Patrick L. Connor, Sanjeev Jain
  • Patent number: 8856416
    Abstract: Numerous embodiments of a method and apparatus for processing latency sensitive electronic data with interrupt moderation are disclosed.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: October 7, 2014
    Assignee: Intel Corporation
    Inventors: Linden Minnick, Patrick L. Connor
  • Patent number: 8730984
    Abstract: A system includes a host and a network controller coupled to the host by a bus. The system includes logic to classify Transmission Control Protocol/Internet Protocol (TCP/IP) receive packets based on the network source, network destination, port source, and port destination of the respective receive packets; and cause queuing of the receive packets in a one of multiple receive queues based on the classifying such that receive packets having the same network source, network destination, port source, and port destination are to be queued to the same one of the multiple queues for processing.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: May 20, 2014
    Assignee: Intel Corporation
    Inventors: Erik K. Mann, Patrick L. Connor, Diamant Nimrod
  • Patent number: 8660133
    Abstract: In general, in one aspect, included are descriptions of providing a single network interface from physical network interfaces that provides a number of receive queues equal to the sum of the number of receive queues provided by each of the physical network interfaces.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: February 25, 2014
    Assignee: Intel Corporation
    Inventor: Patrick L. Connor
  • Patent number: 8493852
    Abstract: A system includes logic to store multiple descriptors, each of the multiple descriptors to be associated with a different set of multiple Transmission Control Protocol/Internet Protocol (TCP/IP) packets received by the network controller, each of the multiple descriptors including a count of the number of packets in the set of multiple packets associated with a respective descriptor. For each of the respective receive packets, the system determines a one of the multiple descriptors based on the network source address, network destination address, source port, and destination port of the respective packet; includes the respective packet in the set of multiple packets associated with the determine one of the multiple descriptors; and updates the one of the multiple descriptors by incrementing the count of the number of packets in the set of multiple packets; and provides data from within the packets to the host.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: July 23, 2013
    Assignee: Intel Corporation
    Inventors: Erik K. Mann, Patrick L. Connor, Diamant Nimrod
  • Patent number: 8473579
    Abstract: Apparatus, systems, and methods to manage networks may operate to receive a packet into an element of an array contained in a memory while a low resource state exists, and to truncate the array at the element responsive to at least one of an indication that the array is full, or an indication that no more packets are available to be received after receiving at least the packet. The receiving and the truncating may be executed by a processor. Additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: June 25, 2013
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, Linden Minnick, Lucas M. Jenison
  • Publication number: 20120243550
    Abstract: Techniques to allocate packets for processing among multiple processor(s). Other embodiments are also disclosed and/or claimed.
    Type: Application
    Filed: January 3, 2012
    Publication date: September 27, 2012
    Inventor: Patrick L. Connor
  • Publication number: 20120226765
    Abstract: Apparatus, systems, and methods to manage networks may operate to receive a packet into an element of an array contained in a memory while a low resource state exists, and to truncate the array at the element responsive to at least one of an indication that the array is full, or an indication that no more packets are available to be received after receiving at least the packet. The receiving and the truncating may be executed by a processor. Additional apparatus, systems, and methods are disclosed.
    Type: Application
    Filed: May 10, 2012
    Publication date: September 6, 2012
    Inventors: Patrick L. Connor, Linden Minnick, Lucas M. Jenison
  • Patent number: 8190765
    Abstract: Computer network apparatus may include a packet-receiving module to receive a packet into an element of a storage array while a low resource state exists, an array truncation module to truncate the array at the element when the array is full or when no more packets are available to be received, and an array indication module to indicate the array after the array truncation module truncates the array. In one embodiment, a system may include a receiving node containing the apparatus. A method may include receiving a packet into an element of an array while a low resource state exists, truncating the array at the element after the array is full or no more packets are available to be received, and indicating the array.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: May 29, 2012
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, Linden Minnick, Lucas M. Jenison
  • Patent number: 8098676
    Abstract: Techniques to allocate packets for processing among multiple processor(s). In an embodiment, capability to receive packets from a plurality of network interfaces may be provided, where each of the network interfaces is associated with at least one receive queue. the plurality of network interfaces may use any of the receive queues. Packet processing may be performed among a plurality of processors. Other embodiments are also disclosed.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: January 17, 2012
    Assignee: Intel Corporation
    Inventor: Patrick L. Connor
  • Publication number: 20110208874
    Abstract: A system includes logic to store multiple descriptors, each of the multiple descriptors to be associated with a different set of multiple Transmission Control Protocol/Internet Protocol (TCP/IP) packets received by the network controller, each of the multiple descriptors including a count of the number of packets in the set of multiple packets associated with a respective descriptor. For each of the respective receive packets, the system determines a one of the multiple descriptors based on the network source address, network destination address, source port, and destination port of the respective packet; includes the respective packet in the set of multiple packets associated with the determine one of the multiple descriptors; and updates the one of the multiple descriptors by incrementing the count of the number of packets in the set of multiple packets; and provides data from within the packets to the host.
    Type: Application
    Filed: May 2, 2011
    Publication date: August 25, 2011
    Applicant: Intel Corporation
    Inventors: Eric K. Mann, Patrick L. Connor, Nimrod Diamant
  • Patent number: 7936755
    Abstract: An arrangement is provided for ingress processing optimization via traffic classification and grouping. A plurality of packets are classified according to a classification criterion. The classified packets are used to generate a packet bundle containing packets that are uniform with respect to the classification criterion. The packet bundle and its corresponding packet bundle descriptor are transferred to a host which then processes the packet bundle as a whole according to the information contained in the packet bundle descriptor.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: May 3, 2011
    Assignee: Intel Corporation
    Inventors: Erik K. Mann, Patrick L. Connor, Diamant Nimrod
  • Patent number: 7929442
    Abstract: Provided are a method, system, and program for managing congestion in a network controller, which in one embodiment, substantially all packets having an assigned priority value below a selected priority level are culled. In another embodiment, selected flows of packets into a network controller are culled at selected culling rates. In one example, a selected flow may be drastically culled. In another example, all flows may be culled at a certain rate which does not exceed a maximum for each flow. In another example, culling techniques may be combined.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 19, 2011
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, Daniel R. Gaur, Linden Cornett
  • Patent number: 7814219
    Abstract: In certain embodiments, a first unit receives a plurality of packets, wherein the plurality of packets are capable of being processed according to at least a first protocol and a second protocol. The first unit sorts the plurality of packets into a first group and a second group, wherein all packets in the first group are capable of being processed according to the first protocol, and all packets in the second group are capable of being processed according to the second protocol. The first unit sends the first group and the second group to a second unit.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: October 12, 2010
    Assignee: Intel Corporation
    Inventor: Patrick L. Connor
  • Patent number: 7773620
    Abstract: Provided are a method, system, and program for identifying overrun conditions in data reception, for example. As a receive buffer approaches capacity, received data packets may be truncated to a smaller size. For example, header information may be saved but payload data discarded. The truncated packets may be used to facilitate sending acknowledgments to trigger resending of lost or dropped packets.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: August 10, 2010
    Assignee: INTEL Corporation
    Inventor: Patrick L. Connor