Patents by Inventor Patrick L. Connor

Patrick L. Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6779070
    Abstract: The present disclosure relates to a method and apparatus to improve the transmission of data between two or more buses, wherein a bridge is used to predict a characteristic of a data transaction that occurs between a first bus, which utilizes a protocol that does not supply the characteristic, and a second bus, which utilizes a protocol that may make use of this information.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: August 17, 2004
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, Patrick J. Luhmann
  • Patent number: 6760799
    Abstract: An apparatus and method for reducing operating system interrupts by queuing incoming network traffic units received by a network interface, where said units are received without interrupting a host environment on receiving queued units. However, if a predetermined number of received units have a same origin, then the host environment is interrupted as subsequent network traffic units are received by the network interface, until a predetermined number of network traffic units are subsequently received from a different origin. Notwithstanding queuing incoming network traffic units, the host environment is interrupted on expiration of a timeout period, or if a predetermined number of units have been queued.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: July 6, 2004
    Assignee: Intel Corporation
    Inventors: Randall D. Dunlap, Patrick L. Connor, John A. Ronciak, Greg D. Cummings, Gary G. Li
  • Publication number: 20040123008
    Abstract: Provided are a method, system and article of manufacture for adjusting interrupt levels. A current system interrupt rate at a computational device is determined, wherein the current system interrupt rate is a sum of interrupt rates from a plurality of interrupt generating agents. The current system interrupt rate is compared with at least one threshold interrupt rate associated with the computational device. Based on the comparison, an interrupt moderation level is adjusted at an interrupt generating agent of the plurality of interrupt generating agents.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Applicant: Intel Corporation
    Inventors: Patrick L. Connor, Eric K. Mann, Hieu T. Tran, Priya Govindarajan, John P. Jacobs, David M. Durham, Gary D. Gumanow, Chun Yang Chiu
  • Publication number: 20040123142
    Abstract: In general, in one aspect, the disclosure describes techniques of detecting a network attack. The method includes receiving at least one packet at a device; and determining whether the at least one received packet has at least one characteristic of a denial of service attack. Based on the determining, the packet may not be processed by a transport layer protocol.
    Type: Application
    Filed: December 18, 2002
    Publication date: June 24, 2004
    Inventors: Scott P. Dubal, Douglas D. Boom, Patrick L. Connor, Mark V. Montecalvo
  • Publication number: 20040111532
    Abstract: Disclosed is a method, system, and program for adding an operation to a structure. If a priority level associated with a data packet identified by the operation has a first designation, placing the operation into a first structure with a least number of operations. If the priority level associated with the data packet identified by the operation has a second designation, placing the operation into a second structure with a most number of operations.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 10, 2004
    Applicant: Intel Corporation
    Inventor: Patrick L. Connor
  • Publication number: 20040111503
    Abstract: Provided are a method, system, and article of manufacture for managing network throughput. An application identifies at least one network connection of a plurality of network connections, wherein packets arriving via the one network connection require greater resources at a computational device relative to resources required by other network connections. The application determines if resources required at the computational device by the plurality of network connections exceed a threshold and eliminates the at least one network connection to the computational device.
    Type: Application
    Filed: December 6, 2002
    Publication date: June 10, 2004
    Applicant: Intel Corporation
    Inventors: Patrick L. Connor, Eric K. Mann
  • Publication number: 20040111537
    Abstract: Disclosed is a method, system, and program for processing an operation. If previously issued operations are being processed, deferring operation processing. If previously issued operations are not being processed, the operation and any operations for which operation processing was previously deferred and that require operation processing are issued.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 10, 2004
    Applicant: Intel Corporation
    Inventors: Patrick L. Connor, Patrick J. Luhmann, Gregory D. Cummings
  • Publication number: 20040111549
    Abstract: Disclosed is a method, system, and program for processing an interrupt. A new interrupt is received. It is determined whether a previous interrupt was correctly claimed. If the previous interrupt was correctly claimed, it is determined whether to claim the new interrupt without determining whether an associated interrupting device generated the new interrupt.
    Type: Application
    Filed: December 10, 2002
    Publication date: June 10, 2004
    Applicant: Intel Corporation
    Inventors: Patrick L. Connor, Linden Minnick, Eric K. Mann
  • Publication number: 20040095935
    Abstract: End-to-end data transfer between computing platforms in a transport control protocol (TCP) environment is improved by restricting which packets are stored in a receive memory of an input/output (I/O) circuit. In one embodiment, received packets are examined as to type, and the number of packets stored in the receive memory is monitored. If the number of stored packets exceeds a threshold value, then subsequently received data packets are discarded, whereas latency-sensitive priority data such as acknowledgements (ACKs) are retained in the receive memory, until the number of stored packets is reduced. Various methods, as well as application of the circuit to a system and to a machine-readable article, are also described.
    Type: Application
    Filed: November 14, 2002
    Publication date: May 20, 2004
    Applicant: Intel Corporation
    Inventor: Patrick L. Connor
  • Patent number: 6735662
    Abstract: A single completion status write back is generated by a controller to inform a driver of completion of a transmission of all frames of an array of frames, as opposed to generating individual write backs for each frame. The driver identifies one of the frames that is reported with the completion status, and applies the completion status to that frame and to all frames of the array sent prior to that frame. Reducing the number of these overhead completion status write backs improves bus and data transfer efficiency.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: May 11, 2004
    Assignee: Intel Corporation
    Inventor: Patrick L. Connor
  • Publication number: 20040073716
    Abstract: Described are a system and method of forwarding data packets from a network interface controller (NIC) to one or more media decoding devices. The NIC may comprise an I/O interface to transmit to communicate with either a host processing system and the one or more media decoding devices. Data packets received at the NIC may be forwarded to the one or more media decoding devices independently of the host processing system.
    Type: Application
    Filed: October 14, 2002
    Publication date: April 15, 2004
    Inventors: Douglas D. Boom, Patrick L. Connor, Mark V. Montecalvo, Scott P. Dubal
  • Patent number: 6721835
    Abstract: While a controller is reading a frame, a driver prepares one or more subsequent frames. A single inform write is sent by the driver to a command register of the controller to inform the controller of completion of preparation of the subsequent frame(s). By preparing the subsequent frame(s) during the reading of the frame and by collectively batching the inform writes of the prepared subsequent frames as the single inform write, instead of sending separate individual inform writes, the reading of frame(s) by the controller is uninterrupted and a number of times that the controller has to arbitrate for bus control is minimized. This advantageously reduces bus contention and latency.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: April 13, 2004
    Assignee: Intel Corporation
    Inventor: Patrick L. Connor
  • Publication number: 20040015686
    Abstract: Two timers are used to improve ingress throughput. Decisions to transfer the ingress packets are made based on when the two timers expire. A first timer is used to time how long a first ingress packet waits before it is transferred. When this first timer expires, the all received ingress packets including the first ingress packet are transferred. A second timer is used to time how long to wait for a new ingress packet to be received. The second timer is reset if a new ingress packet is received before expiration of the second timer. When the second timer expires and no new ingress packet is received during the wait, all received ingress packets including the first ingress packet are transferred.
    Type: Application
    Filed: July 16, 2002
    Publication date: January 22, 2004
    Inventors: Patrick L. Connor, Linden Minnick, Benny Eitan
  • Patent number: 6681275
    Abstract: Numerous embodiments of a method and apparatus for dynamic coalescing are disclosed.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: January 20, 2004
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, David S. Feldman
  • Publication number: 20030236911
    Abstract: Computer network apparatus may include a packet-receiving module to receive a packet into an element of a storage array while a low resource state exists, an array truncation module to truncate the array at the element when the array is full or when no more packets are available to be received, and an array indication module to indicate the array after the array truncation module truncates the array. In one embodiment, a system may include a receiving node containing the apparatus. A method may include receiving a packet into an element of an array while a low resource state exists, truncating the array at the element after the array is full or no more packets are available to be received, and indicating the array.
    Type: Application
    Filed: June 25, 2002
    Publication date: December 25, 2003
    Applicant: Intel Corporation
    Inventors: Patrick L. Connor, Linden Minnick, Lucas M. Jenison
  • Patent number: 6647438
    Abstract: Direct memory access (DMA) transfers to read data from memory are reduced by overlaying data into an immediate data space of a descriptor ring. The descriptor ring includes a context descriptor that points to the data overlaid into the immediate data space. This data space contains smaller blocks of data, such as header or control information for a packet/frame. The descriptor ring further includes scatter gather descriptors that point to data buffers outside of the descriptor ring. These data buffers contain larger blocks of data, such as payload data of the packet/frame. The scatter gather descriptor(s), context descriptor(s), and immediate data space(s) are arranged contiguously in the descriptor ring to allow the descriptor ring to be read in a single direct memory access (DMA) transfer or burst.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: November 11, 2003
    Assignee: Intel Corporation
    Inventors: Patrick L. Connor, Robert G. McVay
  • Patent number: 6633941
    Abstract: An apparatus and method for reducing operating system interrupts by queuing incoming network traffic units received by a network interface, where said units are received without interrupting a host environment on receiving queued units. However, if a predetermined number of received units have a same origin, then the host environment is interrupted as subsequent network traffic units are received by the network interface, until a predetermined number of network traffic units are subsequently received from a different origin. Notwithstanding queuing incoming network traffic units, the host environment is interrupted on expiration of a timeout period, or if a predetermined number of units have been queued.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: October 14, 2003
    Assignee: Intel Corporation
    Inventors: Randall D. Dunlap, Patrick L. Connor, John A. Ronciak, Greg D. Cummings, Gary G. Li
  • Publication number: 20030189945
    Abstract: An arrangement is provided for selective completion indication of controller events. Data to be transmitted is read and transmitted upon receiving a request for transmission. A completion indication assiciated with the status of the transmission is returned only when a request for the completion indication is received.
    Type: Application
    Filed: April 5, 2002
    Publication date: October 9, 2003
    Inventors: Patrick L. Connor, Daniel R. Gaur
  • Publication number: 20030182484
    Abstract: An interrupt processing apparatus, system, and article including a machine-accessible medium, along with a method of processing interrupts, implement interrupt processing in an efficient, parallel manner that reduces average interrupt latency. In one embodiment, the apparatus may include an interrupt receiver coupled to a plurality of interrupt handlers which respond to uniquely identified interrupting events. Responses may occur in an overlapping fashion in a multi-threaded environment. The system may include a processor coupled to a local memory and an interrupt receiver. Interrupt handlers, which may be coupled to the interrupt receiver, process uniquely identified interrupts. The method may include receiving multiple interrupts and executing corresponding interrupt handlers scheduled in response to receipt of the interrupts, with each handler being uniquely adapted to service a particular interrupting event.
    Type: Application
    Filed: March 19, 2002
    Publication date: September 25, 2003
    Applicant: Intel Corporation
    Inventors: Daniel R. Gaur, Patrick L. Connor
  • Publication number: 20030156542
    Abstract: A method, apparatus, and signal-bearing medium for indicating and responding to congestion in a network. When a buffer at a receiver is nearly full, the receiver may send a congestion indication to the sender(s) that is causing the congestion. When the receiver(s) receives the congestion indication, it may implement a flow-control technique to temporarily lower the rate that it is sending the frames to the receiver, and then increase the rate.
    Type: Application
    Filed: February 19, 2002
    Publication date: August 21, 2003
    Applicant: Intel Corporation
    Inventor: Patrick L. Connor