Abstract: In at least some embodiments, a system comprises a plurality of electrical devices and management logic coupled to the electrical devices. While the electrical devices are each in a pre-boot environment, the management logic obtains information from the electrical devices and uses the information to determine electrical compatibility of, and/or configure, the electrical devices.

Abstract: A computer-implemented method is used for determining cooling requirements of a computer system enclosure, where the enclosure includes a number of installed modules, the modules including fan modules. The method includes the steps of determining an individual impedance curve of each installed module; determining fan curves for the installed fan modules; based on the individual impedance curves, determining an overall system impedance curve for the computer system; determining desired performance requirements for the computer system; based on the desired performance requirements, determining corresponding fan curves; and choosing a fan curve that intersects the system impedance curve.

Abstract: In at least some embodiments, a system comprises a plurality of electrical devices and management logic coupled to the electrical devices. While the electrical devices are each in a pre-boot environment, the management logic obtains information from the electrical devices and uses the information to determine electrical compatibility of, and/or configure, the electrical devices.

Abstract: In at least some embodiments, a system comprises a plurality of electrical devices and management logic coupled to the electrical devices. While the electrical devices are each in a pre-boot environment, the management logic obtains information from the electrical devices and uses the information to determine electrical compatibility of, and/or configure, the electrical devices.

Abstract: A system that comprises a first electronic device comprising a non-volatile memory. The system also comprises another electronic device in communication with the first electronic device and comprising a second non-volatile memory. The system further comprises a control logic coupled to the first and second electronic devices. Each of the non-volatile memories stores electrical characteristics associated with a corresponding electronic device. Prior to booting up the first or second electronic device, the control logic obtains and compares at least some of the electrical characteristics and disables the communication as a result of the comparison.

Abstract: An apparatus employs a work request list to access a memory device. The apparatus comprises an upper layer protocol that generates the work request list comprising a plurality of work requests, the work request list having an attribute that indicates the number of the plurality of work requests in the work request list. The apparatus additionally comprises an interface that is adapted to receive the work request list and individually enqueue the plurality of work requests.

Abstract: The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.

Abstract: The disclosed embodiments may relate to memory window access, which may include a memory window and protection domain associated with a process. The memory window access setting or bit may also allow a plurality of memory windows to be associated with a protection domain for a process. The memory window access setting or bit may allow access to the memory window to be for the queue pairs in a certain protection domain or a designated queue pair.

Abstract: A computer-implemented method is used for determining cooling requirements of a computer system enclosure, where the enclosure includes a number of installed modules, the modules including fan modules. The method includes the steps of determining an individual impedance curve of each installed module; determining fan curves for the installed fan modules; based on the individual impedance curves, determining an overall system impedance curve for the computer system; determining desired performance requirements for the computer system; based on the desired performance requirements, determining corresponding fan curves; and choosing a fan curve that intersects the system impedance curve.

Abstract: A system that comprises a first electronic device comprising a non-volatile memory. The system also comprises another electronic device in communication with the first electronic device and comprising a second non-volatile memory. The system further comprises a control logic coupled to the first and second electronic devices. Each of the non-volatile memories stores electrical characteristics associated with a corresponding electronic device. Prior to booting up the first or second electronic device, the control logic obtains and compares at least some of the electrical characteristics and disables the communication as a result of the comparison.

Abstract: A method comprises obtaining a value from each of a plurality of memory devices. Each of the values is indicative of a characteristic of a portion of a communication channel. The method further comprises programming a communication device based at least in part on the characteristic.

Abstract: In at least some embodiments, a system comprises a plurality of electrical devices and management logic coupled to the electrical devices. While the electrical devices are each in a pre-boot environment, the management logic obtains information from the electrical devices and uses the information to determine electrical compatibility of, and/or configure, the electrical devices.

Abstract: A distributed computer system includes a source endnode including a source process which produces message data and a send work queue having work queue elements that describe the message data for sending. A destination endnode includes a destination process and a receive work queue having work queue elements that describe where to place incoming message data. A communication fabric provides communication between the source endnode and the destination endnode. An end-to-end context is provided at the source endnode and the destination endnode storing state information to ensure the reception and sequencing of message data sent from the source endnode to the destination endnode permitting reliable datagram service between the source endnode and the destination endnode.

Abstract: The disclosed embodiments may relate to memory window access and may include a memory window and plurality of queue pairs associated with a process. Each of the plurality of queue pairs may be associated with a memory window context that may have queue pair information. The memory window may be associated with a memory window context that includes a protection information field. Accordingly, access to memory window may be allowed if the queue pair information matches the protection information field.

Abstract: The disclosed embodiments relate to a queuing mechanism that may comprise a shared receive queue having a plurality of buffers. The queuing mechanism may also comprise a plurality of queue pairs, each of the plurality of queue pairs having a receive queue that comprises at least one of the plurality of buffers.

Abstract: The disclosed embodiments relate to a queuing mechanism that may comprise a shared receive queue having a plurality of buffers. The queuing mechanism may also comprise a plurality of queue pairs, each of the plurality of queue pairs having a receive queue that comprises at least one of the plurality of buffers.

Abstract: The disclosed embodiments may relate to memory window access, which may include a memory window and protection domain associated with a process. The memory window access setting or bit may also allow a plurality of memory windows to be associated with a protection domain for a process. The memory window access setting or bit may allow access to the memory window to be for the queue pairs in a certain protection domain or a designated queue pair.

Abstract: The disclosed embodiments may relate to an address translation mechanism that may include a request that corresponds to a memory access operation. The request may include an address mode field. The address translation mechanism may also include an address field that may be used as a virtual address or a physical address depending on the contents of the address mode field.

Abstract: The disclosed embodiments may relate to memory window access and may include a memory window and plurality of queue pairs associated with a process. Each of the plurality of queue pairs may be associated with a memory window context that may have queue pair information. The memory window may be associated with a memory window context that includes a protection information field. Accordingly, access to memory window may be allowed if the queue pair information matches the protection information field.

Abstract: A processor-based system includes a processing unit. The processing unit includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. The processing unit is reset in response to a system reset signal being asserted at a reset input node and only selected portions of the processing unit are reset in response to a partial-reset signal being asserted at a partial-reset input node. The system can also include a number of other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.