Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.

Abstract: Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions. A passivating dielectric insulating layer is positioned on the base regions. A first level base and emitter metallization contacts the emitter regions and passivating dielectric insulating layer on the base regions. An electrically insulating backplane is positioned on the first level base and emitter metallization. A second level metallization contacts the first level base and emitter metallization through conductive vias in the electrically insulating backplane.

Abstract: Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions. An amorphous silicon passivating layer is positioned on the base regions. A first level base and emitter metallization contacts the emitter regions and the amorphous silicon passivating layer on the base regions. An electrically insulating backplane is positioned on the first level base and emitter metallization. A second level metallization contacts the first level base and emitter metallization through conductive vias in the electrically insulating backplane.

Abstract: Fabrication methods for forming self aligned contacts for back contact solar cells are provided.

Abstract: Passivated contact structures and fabrication methods for back contact back junction solar cells are provided. According to one example embodiment, a back contact back junction photovoltaic solar cell is described that has a semiconductor light absorbing layer having a front side and a backside having base regions and emitter regions. A passivating dielectric insulating layer is on the base and emitter regions. A first electrically conductive contact contacts the passivating dielectric insulating layer together having a work function suitable for selective collection of electrons that closely matches a conduction band of the light absorbing layer. A second electrically conductive contact contacts the passivating dielectric insulating layer together having a work function suitable for selective collection of electrons that closely matches a valence band of the light absorbing layer.

Abstract: Solar cell array solutions including monolithic solar cell arrays and fabrication methods. A first patterned cell metallization contacts base and emitter regions of each of a plurality of solar cells having a light receiving frontside and a backside. An electrically insulating continuous backplane layer is attached to the backside of the solar cells and covers the first cell metallization of each of the solar cells. Via holes through the continuous backplane layer provide access to the first cell metallization. A second cell metallization is connected to the first cell metallization of each of the solar cells and electrically interconnects the solar cells in the array.

Abstract: Back contact solar cells having a discontinuous emitter comprising a plurality of emitter islands are provided. The back contact solar cell comprises a semiconductor layer with a background base doping and having a sunlight-receiving frontside and a backside opposite said sunlight-receiving frontside. An emitter layer having a doping opposite said semiconductor layer background doping is positioned on the semiconductor layer backside. A trench isolation pattern partitions the emitter layer and semiconductor layer into a plurality of discontinuous emitter regions on the semiconductor layer backside. At least one base island region contacting the semiconductor layer is positioned within each of the discontinuous emitter regions on the semiconductor layer backside.

Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell using bulk wafers is provided.

Abstract: Fabrication methods for forming thin film back contact solar cells are provided.

Abstract: The present disclosure presents a three-dimensional thin film solar cell (3-D TFSC) substrate having enhanced mechanical strength, light trapping, and metal modulation coverage properties. The substrate includes a plurality of unit cells, which may or may not be different. Unit cells are defined as a small self-contained geometrical pattern which may be repeated. Each unit cell structure includes a wall enclosing a trench. Further, the unit cell includes an aperture having an aperture diameter. For the purposes of the present disclosure, the dimensions of interest include wall thickness, wall height, and aperture diameter. A pre-determined variation in these dimensions among unit cells across the substrate produces specific advantages.

Abstract: The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions and passivation layers using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions.

Abstract: The present application provides effective and efficient structures and methods for the formation of solar cell base and emitter regions using laser processing. Laser absorbent passivation materials are formed on a solar cell substrate and patterned using laser ablation to form base and emitter regions.

Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The reusable template has a three-dimensional (3-D) surface topography comprising a plurality of raised areas comprising a rounded top and separated by a plurality of depressed areas.

Abstract: Solar cell array solutions including monolithic solar cell arrays and fabrication methods. A first patterned cell metallization contacts base and emitter regions of each of a plurality of solar cells having a light receiving frontside and a backside. An electrically insulating continuous backplane layer is attached to the backside of the solar cells and covers the first cell metallization of each of the solar cells. Via holes through the continuous backplane layer provide access to the first cell metallization. A second cell metallization is connected to the first cell metallization of each of the solar cells and electrically interconnects the solar cells in the array.

Abstract: Fabrication methods and structures are provided for the formation of monolithically isled back contact back junction solar cells. In one embodiment, base and emitter contact metallization is formed on the backside of a back contact back junction solar cell substrate. A trench stop layer is formed on the backside of a back contact back junction solar cell substrate and which is electrically isolated from the base and emitter contact metallization. The trench stop layer has a pattern for forming a plurality semiconductor regions. An electrically insulating layer is formed on the base and emitter contact metallization and the etch stop layer. And a trench isolation pattern is formed through the back contact back junction solar cell substrate to the trench stop layer which partitions semiconductor layer into a plurality of solar cell semiconductor regions on the electrically insulating layer.

Abstract: Methods and structures for extracting at least one electric parametric value from a back contact solar cell having dual level metallization are provided.

Abstract: A back contact solar cell is described which includes a semiconductor light absorbing layer; a first-level metal layer (M1), the M1 metal layer on a back side of the light absorbing layer, the back side being opposite from a front side of the light absorbing layer designed to receive incident light; an electrically insulating backplane sheet backside of said solar cell with the M1 layer, the backplane sheet comprising a plurality of via holes that expose portions of the M1 layer beneath the backplane sheet; and an M2 layer in contact with the backplane sheet, the M2 layer made of a sheet of pre-fabricated metal foil material comprising a thickness of between 5-250 ?m, the M2 layer electrically connected to the M1 layer through the via holes in the backplane sheet.

Abstract: A photovoltaic solar cell is described that, according to one example embodiment, includes a semiconductor light absorbing layer and a dielectric stack on at least one of a front side of the light absorbing layer or a back side of the light absorbing layer. The dielectric stack includes a tunneling dielectric layer being sufficiently thin for charge carriers to tunnel across, and an overlaying dielectric layer being a different material than the overlaying dielectric. The solar cell also includes an electrically conductive contact physically contacting the overlaying dielectric. The electrically conductive contact and the overlaying dielectric together have either a work function suitable for selective collection of electrons that closely matches a conduction band of the light absorbing layer, or a work function suitable for selective collection of holes that closely matches a valence band of the light absorbing layer.

Abstract: A method for thermal processing of a silicon substrate wherein first a silicon substrate is heated to an idle load temperature in the range of approximately 700° to 900° C. The silicon substrate is then heated to a temperature in the range of approximately 975° to 1200° C. in less than approximately 20 minutes. After thermal processing, the silicon substrate is cooled to an idle unload temperature in the range of approximately 700° to 900° C. in less than approximately 20 minutes.

Abstract: Solar photovoltaic window blind slats for power generation from internal and external light sources are provided are provided. A plurality of solar cells are attached to at least two sides of a slat core. Distributed maximum power point tracking optimizer components are associated with each solar cell. The solar cells and corresponding distributed maximum power point tracking optimizer components on each slat side are connected in electrical series.