Patents by Inventor Pawan Kapur

Pawan Kapur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8241940
    Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.
    Type: Grant
    Filed: February 12, 2011
    Date of Patent: August 14, 2012
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D Kamian, Jay Ashjaee, Takao Yonehara
  • Patent number: 8064239
    Abstract: Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 22, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mehmet Günhan Ertosun, Krishna Chandra Saraswat, Pawan Kapur
  • Publication number: 20110256654
    Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.
    Type: Application
    Filed: February 12, 2011
    Publication date: October 20, 2011
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D Kamian, Jay Ashjaee, Takao Yonehara
  • Publication number: 20110108098
    Abstract: The present disclosure enables high-volume cost effective production of three-dimensional thin film solar cell (3-D TFSC) substrates. First, the present disclosure discloses pyramid-like unit cell structure 16 and 50 which enable epitaxial growth through their open pyramidal structure. The present disclosure than gives four 3-D TFSC embodiments 70, 82, 100, and 110 which may combined as necessary. A basic 3-D TFSC having a substrate, emitter, oxidation on the emitter, front and back metal contacts allows simple processing. Other embodiments disclose a selective emitter, selective backside metal contact, and front-side SiN ARC layers. Several processing methods including process flows 150, 200, 250, 300, and 350 enable production of these 3-D TFSC. Further, the present disclosure enables higher throughput through the use of dual sided template 400. By processing the substrate in the template, the present disclosure increases yield and reduces processing steps.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 12, 2011
    Inventor: Pawan Kapur
  • Patent number: 7875522
    Abstract: Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: January 25, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Pawan Kapur, Michael West Wiemer
  • Publication number: 20110014742
    Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The template has a shape such that the 3-D shape is substantially retained after each substrate release. Prior art reusable templates may have a tendency to change shape after each subsequent reuse; the present disclosure aims to address this and other deficiencies from the prior art, therefore increasing the reuse life of the template.
    Type: Application
    Filed: May 24, 2010
    Publication date: January 20, 2011
    Applicant: SOLEXEL, INC.
    Inventors: Suketu Parikh, David Dutton, Pawan Kapur, Somnath Nag, Mehrdad Moslehi, Joe Kramer, Nevran Ozguven, Asli Buccu Ucok
  • Publication number: 20100304522
    Abstract: A front contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, and a back surface field are formed through ion implantation processes. In yet another embodiment, a back contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, base regions, and a front surface field are formed through ion implantation processes.
    Type: Application
    Filed: May 5, 2010
    Publication date: December 2, 2010
    Applicant: SOLEXEL, INC.
    Inventors: Virendra V. Rana, Pawan Kapur, Mehrdad M. Moslehi
  • Publication number: 20100294333
    Abstract: The present disclosure presents a three-dimensional thin film solar cell (3-D TFSC) substrate having enhanced mechanical strength, light trapping, and metal modulation coverage properties. The substrate includes a plurality of unit cells, which may or may not be different. Unit cells are defined as a small self-contained geometrical pattern which may be repeated. Each unit cell structure includes a wall enclosing a trench. Further, the unit cell includes an aperture having an aperture diameter. For the purposes of the present disclosure, the dimensions of interest include wall thickness, wall height, and aperture diameter. A pre-determined variation in these dimensions among unit cells across the substrate produces specific advantages.
    Type: Application
    Filed: March 22, 2010
    Publication date: November 25, 2010
    Applicant: SOLEXEL, INC.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi, Pawan Kapur, Suketu Parikh
  • Publication number: 20100149864
    Abstract: Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
    Type: Application
    Filed: November 12, 2009
    Publication date: June 17, 2010
    Inventors: Mehmet Günhan Ertosun, Krishna Chandra Saraswat, Pawan Kapur
  • Publication number: 20080272391
    Abstract: Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects.
    Type: Application
    Filed: March 28, 2008
    Publication date: November 6, 2008
    Inventors: Pawan Kapur, Michael West Wiemer
  • Patent number: 7418166
    Abstract: Optical devices having integrated waveguide and active areas are realized using a crystallization approach involving the inhibition of defects typically associated with liquid-phase crystalline growth of lattice mismatched materials. According to one example embodiment, a growth region is formed such that the region is isolated from a silicon portion of silicon material. The region extends from a silicon-based seeding area of the substrate. A semiconductor material is deposited on a Silicon-based seeding area and in the growth region. A single crystalline material is formed from the deposited semiconductor material by heating and cooling the deposited semiconductor material while directing growth of the semiconductor material from the Silicon-based seeding area and through an opening sufficiently narrow to mitigate crystalline defects. A light-communicating device is formed by etching the silicon material over an insulator layer and etching the single crystalline material.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: August 26, 2008
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Pawan Kapur, Yu-Hsuan Kuo, Michael West Wiemer, David A. B. Miller