Abstract: A mechanism to prevent unauthorized physical use of an electronic device includes a main circuit board, a plurality of light sources, a plurality of sensors, a base, a plurality of optical members, and a magnetic member. The base comprises a base body and a plurality of guiding members. Each optical member comprises a main body and a magnetic portion. The main body of each optical member can change either a direction of propagation of light or a wavelength of light emitted from a light source, or both, and can propagate such light to a sensor which can forward to a control unit electrical signals representing a password input. When the electronic device is detached, the magnetic member attracts the magnetized optical members into random disorder on the cover, thereby destroying the predefined order.

Abstract: The invention provide a control method, including: obtaining a time division scheme of a STA in a next cruise monitoring period, where the next cruise monitoring period includes N adjustment periods and N monitoring periods determined by means of division according to N preset points; configuring control information according to the time division scheme, where the control information is for controlling an operating status of the STA in each adjustment period in the next cruise monitoring period; and sending the control information to the STA.

Abstract: A mechanism to prevent unauthorized physical use of an electronic device includes a main circuit board, a plurality of light sources, a plurality of sensors, a base, a plurality of optical members, and a magnetic member. The base comprises a base body and a plurality of guiding members. Each optical member comprises a main body and a magnetic portion. The main body of each optical member can change either a direction of propagation of light or a wavelength of light emitted from a light source, or both, and can propagate such light to a sensor which can forward to a control unit electrical signals representing a password input. When the electronic device is detached, the magnetic member attracts the magnetized optical members into random disorder on the cover, thereby destroying the predefined order.

Abstract: A server rack is provided. The server rack includes at least one server component and an asset tag corresponding to the at least one server component. The asset tag includes a support bar positioned such that the at least one server component is removable from the server rack without removing the asset tag, and an actuator connected to the support bar and configured to rotate the support bar between the at least two positions. The asset tag also includes an interface supported by the support bar, wherein the interface is configured to provide an indicator regarding the location and status of the corresponding server component.

Abstract: This application discloses a D-3-phosphoglycerate dehydrogenase allosteric inhibitor and the use thereof. In one class is the benzoyl hydrazine compound for the allosteric site MDL-1 of the enzyme, and the other class is the furan compound for the allosteric site MDL-2 of the enzyme. In vitro enzymatic activity tests, cell viability tests and mouse xenograft model experiments confirm that the two classes of allosteric inhibitors can specifically inhibit the activity of D-3-phosphoglycerate dehydrogenase and delay the growth of cancer cells by reducing the overexpression of the enzyme in cancer cells. Same are used alone or in combination, or in combination with other anti-cancer drugs and can treat, prevent, or inhibit tumor diseases, including breast cancer, colon cancer, melanoma and non-small cell lung cancer.

Abstract: Examples of the present disclosure provide a channel access period allocation method. The method includes: receiving, by an access point (AP), first information sent by a first station (STA) for requesting a dynamic service period (DSP) from the AP; and sending, by the AP, second information to the first STA to instruct the first STA to send a data frame to the AP in a first DSP, where a start time of the first DSP falls within a first preset time period following an end time of an SP of the first STA, and the first DSP requested by the first STA is pre-allocated to a second STA having a priority that is lower than that of the first STA, where a time delay of the first STA for sending the data frame to the AP satisfies a time delay requirement of a quality of service QoS in the first preset time period.

Abstract: At least one method, apparatus, and system providing semiconductor devices comprising a first gate having a first width and comprising a first work function metal (WFM); a first liner disposed over the first WFM; a first gate metal having a first height; and a first pinch-off spacer over the first WFM, the first liner, and the first gate metal to above the first height; and a second gate having a second width greater than the first width, and comprising a second WFM; a second liner disposed over the second WFM; a second gate metal having substantially the first height; and a first conformal spacer over the second WFM and the second liner.

Abstract: The present disclosure relates to methods for forming fill materials in trenches having different widths and related structures. A method may include: forming a first fill material in a first and second trench where the second trench has a greater width than the first trench; removing a portion of the first fill material from each trench and forming a second fill material over the first fill material; removing a portion of the first and second fill material within the second trench; and forming a third fill material in the second trench. The structure may include a first fill material in trenches having different widths wherein the upper surfaces of the first fill material in each trench are substantially co-planar. The structure may also include a second fill material on the first fill material in each trench, the second fill material having a substantially equal thickness in each trench.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a contact over an active gate structure and methods of manufacture. The structure includes: an active gate structure composed of conductive material located between sidewall material; an upper sidewall material above the sidewall material, the upper sidewall material being different material than the sidewall material; and a contact structure in electrical contact with the conductive material of the active gate structure. The contact structure is located between the sidewall material and between the upper sidewall material.

Abstract: A method for processing information, terminal device and a computer storage medium are disclosed. The method for processing information includes that: a first control instruction is acquired, and a first application is switched to a preset mode according to the first control instruction; a first triggering operation is acquired based on the preset mode, at least two pieces of multimedia data are selected based on the first triggering operation, and a first playing interface is generated; when a second control instruction is acquired, the at least two pieces of multimedia data in the first playing interface are sequentially played; in a process of playing first multimedia data in the at least two pieces of multimedia data, first audio data is acquired; and the first multimedia data and the first audio data are synthesized as second multimedia data.

Abstract: This application discloses a D-3-phosphoglycerate dehydrogenase allosteric inhibitor and the use thereof. In one class is the benzoyl hydrazine compound for the allosteric site MDL-1 of the enzyme, and the other class is the furan compound for the allosteric site MDL-2 of the enzyme. In vitro enzymatic activity tests, cell viability tests and mouse xenograft model experiments confirm that the two classes of allosteric inhibitors can specifically inhibit the activity of D-3-phosphoglycerate dehydrogenase and delay the growth of cancer cells by reducing the overexpression of the enzyme in cancer cells. Same are used alone or in combination, or in combination with other anti-cancer drugs and can treat, prevent, or inhibit tumor diseases, including breast cancer, colon cancer, melanoma and non-small cell lung cancer.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a contact over an active gate structure and methods of manufacture. The structure includes: an active gate structure composed of conductive material located between sidewall material; an upper sidewall material above the sidewall material, the upper sidewall material being different material than the sidewall material; and a contact structure in electrical contact with the conductive material of the active gate structure. The contact structure is located between the sidewall material and between the upper sidewall material.

Abstract: A method of controlling NFET and PFET gate heights across different gate widths with chamfering and the resulting device are provided. Embodiments include forming an ILD over a fin; forming cavities in the ILD, each with similar or different widths; forming a high-K dielectric layer over the ILD and in each cavity; forming a pWF metal layer over the dielectric layer in one cavity; recessing the pWF metal layer to a height above the fin; forming an nWF metal layer in the cavities over the dielectric and pWF metal layers; recessing the nWF metal layer to a height above the pWF metal layer; forming a barrier layer over the dielectric and nWF metal layers; filling the cavities with a low-resistive metal; and recessing the barrier and dielectric layers to a height above the nWF metal layer; and concurrently etching the low-resistive metal.

Abstract: The present disclosure provides a latch assembly for securing an electronic component within a computing device. The latch assembly includes a latch, a base, and a cover. The latch includes a first structural member with a first plurality of pins; a second structural member with a second plurality of pins; at least one linking element that connects the first structural member with the second structural member; and a first securing element located at the first structural member. The base includes a receiving space for receiving the latch; a first plurality of slots configured to receive the first plurality of pins; a second plurality of slots configured to receive the second plurality of pins; a plurality of protruding elements; and a second securing element corresponding with the first securing element. The cover is secured to the base at the plurality of protruding elements.

Abstract: A method of forming contacts over active gates is provided. Embodiments include forming first and second gate structures over a portion of a fin; forming a first and second RSD in a portion of the fin between the first gate structures and between the first and the second gate structure, respectively; forming TS structures over the first and second RSD; forming a first cap layer over the first and second gate structures or over the TS structures; forming a metal oxide liner over the substrate, trenches formed; filling the trenches with a second cap layer; forming an ILD layer over the substrate; forming a CA through a first portion of the ILD and metal oxide layer down to the TS structures over the second RSD; and forming a CB through a second portion of the ILD and metal oxide layer down to the first gate structures.

Abstract: At least one method, apparatus and system disclosed herein involves forming semiconductor devices comprising vertically aligned gates, metal hard masks, and nitride regions. The semiconductor device may contain a semiconductor substrate; a gate disposed on the semiconductor substrate; a metal hard mask vertically aligned with the gate; a nitride region vertically aligned with the gate and the metal hard mask; and source/drain (S/D) regions disposed in proximity to the gate.

Abstract: A control circuit providing an output voltage and including an N-type transistor, a first P-type transistor and a second P-type transistor is provided. The N-type transistor is coupled to a first power terminal. The first P-type transistor includes a first source, a first drain, a first gate and a first bulk. The first gate is coupled to a gate of the N-type transistor. The first bulk is coupled to the first source. The second P-type transistor includes a second source, a second drain, a second gate and a second bulk. The second source is coupled to a second power terminal. The second drain and the second bulk are coupled to the first bulk.

Abstract: The present invention discloses an apparatus and a method for scheduling a timeslot. The apparatus includes: a first acquiring module, configured to acquire first interference information; a second acquiring module, configured to acquire second interference information; a third acquiring module, configured to acquire timeslot scheduling information of a link of the at least one second BSS, where the timeslot scheduling information is used to indicate information about a scheduled timeslot of the link of the at least one second BSS; and a scheduling module, configured to schedule a timeslot for a link of the first BSS according to the first interference information, the second interference information, and the timeslot scheduling information. According to the apparatus and the method for scheduling a timeslot in embodiments of the present invention, interference to a link of another network can be avoided actively, and a timeslot can be scheduled properly.

Abstract: A locking mechanism for securing a component card to a main board is provided and includes a base having a top portion with a beveled edge and a coupling portion engageable with the main board. The locking mechanism includes a sliding element slidably, coupled to the base, having an extended protrusion. The sliding element is slidable between a locked and an unlocked position, where the protrusion is displaced towards the base in the unlocked position. The locking mechanism includes a biasing element between the base and the sliding element within a protuberance opposite the protrusion. The biasing element urges the sliding element toward the locked position. The protuberance includes an aperture formed at an end opposite the protrusion and allows a portion of the biasing element to pass through. In the locked position, a bottom surface of the protrusion and a top surface of the base define a receiving space.

Abstract: A server rack is provided. The server rack includes at least one server component and an asset tag corresponding to the at least one server component. The asset tag includes a support bar positioned such that the at least one server component is removable from the server rack without removing the asset tag, and an actuator connected to the support bar and configured to rotate the support bar between the at least two positions. The asset tag also includes an interface supported by the support bar, wherein the interface is configured to provide an indicator regarding the location and status of the corresponding server component.