Patents by Inventor Pei Liu
Pei Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190096679Abstract: Structures for a field-effect transistor and methods for forming a structure for a field-effect transistor. A gate cavity is formed in a dielectric layer that includes a bottom surface and a plurality sidewalls that extend to the bottom surface. A gate dielectric layer is formed at the sidewalls and the bottom surface of the gate cavity. A work function metal layer is deposited on the gate dielectric layer at the sidewalls and the bottom surface of the gate cavity. A fill metal layer is deposited inside the gate cavity after the work function metal layer is deposited. The fill metal layer is formed in direct contact with the work function metal layer.Type: ApplicationFiled: September 22, 2017Publication date: March 28, 2019Inventors: Balaji Kannan, Bala Haran, Vimal K. Kamineni, Sungkee Han, Neal Makela, Suraj K. Patil, Pei Liu, Chih-Chiang Chang, Katsunori Onishi, Keith Kwong Hon Wong, Ruilong Xie, Chanro Park, Min Gyu Sung
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Publication number: 20190059167Abstract: The present disclosure provides a latch assembly for securing an electronic component within a computing device. The latch assembly includes a latch, a base, and a cover. The latch includes a first structural member with a first plurality of pins; a second structural member with a second plurality of pins; at least one linking element that connects the first structural member with the second structural member; and a first securing element located at the first structural member. The base includes a receiving space for receiving the latch; a first plurality of slots configured to receive the first plurality of pins; a second plurality of slots configured to receive the second plurality of pins; a plurality of protruding elements; and a second securing element corresponding with the first securing element. The cover is secured to the base at the plurality of protruding elements.Type: ApplicationFiled: October 12, 2017Publication date: February 21, 2019Inventors: Chao-Jung CHEN, Chih-Hsiang LEE, Kun-Pei LIU, Tsung-Cheng LIN
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Patent number: 10157796Abstract: The disclosure relates to methods including: forming a soft mask; forming a first marking trench within a portion of the soft mask by selectively removing a portion of the soft mask at a first location, over one of a pair of gate trenches; forming an insulative liner on the soft mask and within the first marking trench; forming an anti-reflective film on the insulative liner and within the first marking trench; selectively removing the anti-reflective film and the insulative liner at a second location to expose a portion of the soft mask positioned over the other one of the pair of gate trenches; forming a second marking trench by removing another portion of the soft mask at the second location; and removing a portion of the soft mask at the first and second marking trenches to expose a lower surface of each of the pair of gate trenches.Type: GrantFiled: November 14, 2017Date of Patent: December 18, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Laertis Economikos, Chanro Park, Ruilong Xie, Pei Liu
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Patent number: 10131619Abstract: The present invention relates to ?-asary-laldehyde ester. The chemical structure of the related ?-asary-laldehyde ester is of formula I.Type: GrantFiled: November 26, 2015Date of Patent: November 20, 2018Assignee: NORTHWEST UNIVERSITYInventors: Xiaohui Zheng, Fanggang Qin, Yajun Bai, Shixiang Wang, Yi Zhang, Xirui He, Pei Liu
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Patent number: 10135742Abstract: Embodiments of the present invention provide a data transmission apparatus and method. The data transmission apparatus includes: a processor, configured to, record a link quality indication value corresponding to received data and add 1 to a count value, if the data is received within a preset period of time; if it is learned by comparison that the count value is not less than a quantity N of pieces of data allowed to be transmitted in a current period, calculate an average value of link quality indication values; and compare the average value with a threshold to determine a quantity of pieces of data allowed to be transmitted in a next period The apparatus also includes a transceiver, configured to reply with a periodicity acknowledgment frame that carries the quantity of pieces of data allowed to be transmitted in the next period.Type: GrantFiled: June 16, 2016Date of Patent: November 20, 2018Assignee: Huawei Technologies Co., Ltd.Inventor: Pei Liu
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Publication number: 20180331968Abstract: The invention provide a control method, including: obtaining a time division scheme of a STA in a next cruise monitoring period, where the next cruise monitoring period includes N adjustment periods and N monitoring periods determined by means of division according to N preset points; configuring control information according to the time division scheme, where the control information is for controlling an operating status of the STA in each adjustment period in the next cruise monitoring period; and sending the control information to the STA.Type: ApplicationFiled: July 25, 2018Publication date: November 15, 2018Inventors: Yong LI, Dejian LI, Pei LIU
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Publication number: 20180323113Abstract: A method of controlling NFET and PFET gate heights across different gate widths with chamfering and the resulting device are provided. Embodiments include forming an ILD over a fin; forming cavities in the ILD, each with similar or different widths; forming a high-K dielectric layer over the ILD and in each cavity; forming a pWF metal layer over the dielectric layer in one cavity; recessing the pWF metal layer to a height above the fin; forming an nWF metal layer in the cavities over the dielectric and pWF metal layers; recessing the nWF metal layer to a height above the pWF metal layer; forming a barrier layer over the dielectric and nWF metal layers; filling the cavities with a low-resistive metal; and recessing the barrier and dielectric layers to a height above the nWF metal layer; and concurrently etching the low-resistive metal.Type: ApplicationFiled: July 18, 2018Publication date: November 8, 2018Inventors: Suraj Kumar PATIL, Katsunori ONISHI, Pei LIU, Chih-Chiang CHANG
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Publication number: 20180301804Abstract: The present invention relates to the field of communications technologies, and discloses a beam tracking method, apparatus, and system, so as to ensure rapid discovery and to switch from an optimal link to a backup link in time, or switch from a backup link to an optimal link, thereby effectively improving a throughput of a system link. The beam tracking method includes: transmitting, by a beam tracking initiator, a beam tracking request to a beam tracking responder; receiving, by the beam tracking initiator, an enhanced beam tracking training auxiliary sequence transmitted, according to the enhanced beam tracking request, by the beam tracking responder; and when it is determined according to a reception detection result of the enhanced beam tracking training auxiliary sequence that it is necessary to switch to a backup beam link, transmitting, by the beam tracking initiator, first link switching information to the beam tracking responder.Type: ApplicationFiled: June 18, 2018Publication date: October 18, 2018Inventors: Bo GAO, Depeng JIN, Dejian LI, Jiamin CHEN, Pei LIU
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Patent number: 10090402Abstract: The method includes steps for improving gate cut isolation region critical dimension (CD) control. Prior to replacement metal gate (RMG) formation, a first sacrificial gate adjacent to first and second channel regions and made of a first sacrificial material (e.g., polysilicon or amorphous silicon) is replaced with a second sacrificial gate made of a second sacrificial material (e.g., amorphous carbon) that is more selectively and anisotropically etchable. A cut is made, dividing the second sacrificial gate into first and second sections, and the cut is then filled with a dielectric to form the gate cut isolation region. The second sacrificial material ensures that, when an opening in a mask pattern used to form the cut extends over a gate sidewall spacer and interlayer dielectric (ILD) material, recesses are not form within the spacer or ILD. Thus, the CD of the isolation region can be controlled.Type: GrantFiled: July 25, 2017Date of Patent: October 2, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Chanro Park, Chang Ho Maeng, Pei Liu, Junsic Hong, Laertis Economikos, Ruilong Xie
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Patent number: 10079997Abstract: A multi-video stream transmission method and a device, where an access point sets an initial sending time and a sending period of an intra frame (I frame) of each station (STA) associated with the access point, and allocates an I frame service period and a predictive frame (P frame) service period to each STA according to the initial sending time and the sending period of the I frame of each STA, where each STA exclusively occupies a channel in the I frame service period and the P frame service period such that I frame sending time of STAs are staggered, network load balance is achieved, and it is ensured that a latency of each STA meets a quality of service (QoS) requirement.Type: GrantFiled: May 26, 2017Date of Patent: September 18, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Dejian Li, Pei Liu
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Patent number: 10063763Abstract: A camera module includes a transparent plate, a top sensing layer, and a light-cutting layer. The transparent plate includes a bottom surface and a top surface opposite to the bottom surface. The top sensing layer is formed on the bottom surface. The light-cutting layer is formed on the top surface, and includes a blocking material and transparent apertures penetrating through the blocking material.Type: GrantFiled: July 7, 2016Date of Patent: August 28, 2018Assignee: TDK TAIWAN CORP.Inventors: Chin-Fu Chen, I-Pei Liu
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Patent number: 10056303Abstract: A method of controlling NFET and PFET gate heights across different gate widths with chamfering and the resulting device are provided. Embodiments include forming an ILD over a fin; forming cavities in the ILD, each with similar or different widths; forming a high-K dielectric layer over the ILD and in each cavity; forming a pWF metal layer over the dielectric layer in one cavity; recessing the pWF metal layer to a height above the fin; forming an nWF metal layer in the cavities over the dielectric and pWF metal layers; recessing the nWF metal layer to a height above the pWF metal layer; forming a barrier layer over the dielectric and nWF metal layers; filling the cavities with a low-resistive metal; and recessing the barrier and dielectric layers to a height above the nWF metal layer; and concurrently etching the low-resistive metal.Type: GrantFiled: April 21, 2017Date of Patent: August 21, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Suraj Kumar Patil, Katsunori Onishi, Pei Liu, Chih-Chiang Chang
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Patent number: 10027027Abstract: The present invention relates to the field of communications technologies, and discloses a beam tracking method, apparatus, and system, so as to ensure rapid discovery and to switch from an optimal link to a backup link in time, or switch from a backup link to an optimal link, thereby effectively improving a throughput of a system link. The beam tracking method includes: transmitting, by a beam tracking initiator, a beam tracking request to a beam tracking responder; receiving, by the beam tracking initiator, an enhanced beam tracking training auxiliary sequence transmitted, according to the enhanced beam tracking request, by the beam tracking responder; and when it is determined according to a reception detection result of the enhanced beam tracking training auxiliary sequence that it is necessary to switch to a backup beam link, transmitting, by the beam tracking initiator, first link switching information to the beam tracking responder.Type: GrantFiled: March 8, 2016Date of Patent: July 17, 2018Assignee: Huawei Technologies Co., Ltd.Inventors: Bo Gao, Depeng Jin, Dejian Li, Jiamin Chen, Pei Liu
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Patent number: 10014180Abstract: A structure and method for forming a tungsten region for a replacement metal gate (RMG). The method for forming the tungsten region may include, among other things, forming a first tungsten region i.e., tungsten seed layer, on a liner in a trench of a dielectric layer; removing a portion of the liner and the tungsten seed layer to expose an uppermost surface of a work function metal (WFM) layer wherein an uppermost surface of the liner and tungsten seed layer is positioned below an uppermost surface of the dielectric layer; and forming a second tungsten region from the tungsten seed layer. The tungsten region may be formed to contact the uppermost surface liner, the uppermost surface of WFM layer, and/or the sidewalls of the trench. The tungsten region may include a single crystallographic orientation. The tungsten region may also include an uppermost surface with a substantially arcuate cross-sectional geometry.Type: GrantFiled: August 21, 2017Date of Patent: July 3, 2018Assignee: GLOBALFOUNDRIES INC.Inventors: Neal A. Makela, Vimal K. Kamineni, Pei Liu, Chih-Chiang Chang
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Patent number: 9992904Abstract: A device enclosure includes a housing, a shaft, and a front panel. The housing defines a receiving bay configured to slidably receive an electronic device. The shaft is slidably mounted on a sidewall of said housing, includes a rear flange, and is slidable between a retracted position and a deployed position. The front panel is rotatably mounted on the shaft by a hinge and having a fulcrum projection and is rotatable between a closed position that closes a front of the receiving bay and a fully open position which extends away from the housing.Type: GrantFiled: April 13, 2016Date of Patent: June 5, 2018Assignee: QUANTA COMPUTER INC.Inventors: Chao-Jung Chen, Yaw-Tzorng Tsorng, Kun-Pei Liu, Tsung-Cheng Lin
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Publication number: 20180132253Abstract: Examples of the present disclosure provide a channel access period allocation method. The method includes: receiving, by an access point (AP), first information sent by a first station (STA) for requesting a dynamic service period (DSP) from the AP; and sending, by the AP, second information to the first STA to instruct the first STA to send a data frame to the AP in a first DSP, where a start time of the first DSP falls within a first preset time period following an end time of an SP of the first STA, and the first DSP requested by the first STA is pre-allocated to a second STA having a priority that is lower than that of the first STA, where a time delay of the first STA for sending the data frame to the AP satisfies a time delay requirement of a quality of service QoS in the first preset time period.Type: ApplicationFiled: January 9, 2018Publication date: May 10, 2018Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yong LI, Dejian LI, Pei LIU
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Patent number: 9963323Abstract: An elevator balance coefficient detection method includes the following steps: (1) connecting an electrical energy detection device to a power line of an elevator driving motor, and connecting a speed detection device to a mechanical transmission member of an elevator car; (2) measuring and recording in real time the car speed data and driving motor power data when the car and a counterweight move to a same horizontal location; and (3) based on above detection data and basic parameters of the elevator to be tested, and according to transmission relationship between the elevator's operating condition and energy during operation, calculating and obtaining the value of the balance coefficient. A corresponding device includes an elevator data acquiring system and a detection data processing system. The elevator electrical energy detection device is an AC broadband power measuring device.Type: GrantFiled: May 17, 2013Date of Patent: May 8, 2018Assignee: TIANJIN HAOYA TECHNOLOGY DEVELOPMENT CO., LTD.Inventor: Pei Liu
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Patent number: 9933823Abstract: A retractable component tray holder includes: an outer tray having first and second outer tray sidewalls, and a bottom; an inner tray configured to retract into and extend from the outer tray, the inner tray having a first inner tray sidewall and a bottom; a fan chassis configured to receive at least one fan, the fan chassis being adjacent a rear of the inner tray; a bottom support assembly comprising a first bottom support slideably mounted on the bottom of the outer tray, a second bottom support slideably mounted on the first bottom support, and the inner tray being slideably mounted on the second bottom support; and a second side support assembly comprising a side support slideably mounted on the second sidewall, a bracket slideably mounted on the side support, and the fan chassis mounted on the bracket.Type: GrantFiled: May 9, 2016Date of Patent: April 3, 2018Assignee: QUANTA COMPUTER INC.Inventors: Chao-Jung Chen, Yaw-Tzorng Tsorng, Kun-Pei Liu, Yi-Te Chang
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Patent number: 9936497Abstract: Embodiments of the present invention disclose a node scheduling method, where the method includes: configuring, for a node, a working period matched with a performance indicator of the node, where duration of the working period is an integer multiple of duration of a super frame, and the super frame is a super frame corresponding to a beacon frame in a network in which the node is located; and sending, to the node, an updated beacon frame that includes information about the working period, so that the node acquires the information about the working period from the updated beacon frame, receives a working beacon frame, establishes a super frame corresponding to the working beacon frame until the working period ends, and then repeats the receiving a working beacon frame and establishing a super frame corresponding to the working beacon frame until the updated beacon frame is received again.Type: GrantFiled: June 9, 2015Date of Patent: April 3, 2018Assignees: Huawei Technologies Co., Ltd., Beijing University of Posts and TelecommunicationsInventors: Pei Liu, Weixia Zou, Yibo Wang
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Patent number: 9921615Abstract: A component carrier with a tray, a slide cage, a level, and a tilting mechanism. The tray has a bottom surface with a groove formed therein. The slide cage is actuatably coupled with the tray and has a receiving space and an undercarriage. The lever is pivotally coupled with the slide cage and has a lower portion for engaging the groove to transition the slide cage between a first position and a second position. The tilting mechanism is coupled with the tray and configured for biasing the slide cage to the second position. In the first position the undercarriage of the slide cage is positioned proximal to the bottom surface of the tray. In the second position a first end portion of the undercarriage of the slide cage is displaced away from the bottom surface and a second end portion is positioned proximal to the bottom surface of the tray.Type: GrantFiled: April 7, 2016Date of Patent: March 20, 2018Assignee: QUANTA COMPUTER INC.Inventors: Chao-Jung Chen, Yaw-Tzorng Tsorng, Kun-Pei Liu, Yi-Te Chang