Patents by Inventor Peter Almern Losee

Peter Almern Losee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140070231
    Abstract: A semiconductor device is provided. The semiconductor device includes an avalanche photodiode unit and a thyristor unit. The avalanche photodiode unit is configured to receive incident light to generate a trigger current and comprises a wide band-gap semiconductor. The thyristor unit is configured to be activated by the trigger current to an electrically conductive state. A semiconductor device and a method for making a semiconductor device are also presented.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Stanislav Ivanovich Soloviev, Ahmed Elasser, Alexander Viktorovich Bolotnikov, Alexey Vert, Peter Almern Losee
  • Publication number: 20130323873
    Abstract: A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.
    Type: Application
    Filed: August 7, 2013
    Publication date: December 5, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: AHMED ELASSER, STEPHEN DALEY ARTHUR, ALEXEY VERT, STANISLAV IVANOVICH SOLOVIEV, PETER ALMERN LOSEE
  • Patent number: 8536617
    Abstract: A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 17, 2013
    Assignee: General Electric Company
    Inventors: Alexey Vert, Ahmed Elasser, Arthur Stephen Daley, Stanislav I Soloviev, Peter Almern Losee
  • Patent number: 8536641
    Abstract: A semiconductor device includes a substrate comprising a semiconductor material. The substrate has a surface that defines a surface normal direction and includes a P-N junction comprising an interface between a first region and a second region, where the first (second) region includes a first (second) dopant type, so as to have a first (second) conductivity type. The substrate includes a termination extension region disposed adjacent to the P-N junction and having an effective concentration of the second dopant type that is generally the effective concentration of the second dopant type in the second doped region. The substrate includes an adjust region disposed adjacent to the surface and between the surface and at least part of the termination extension region, where the effective concentration of the second dopant type generally decreases when moving from the termination extension region into the adjust region along the surface normal direction.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: September 17, 2013
    Assignee: General Electric Company
    Inventors: Ramakrishna Rao, Stephen Daley Arthur, Peter Almern Losee, Kevin Dean Matocha
  • Publication number: 20130221374
    Abstract: A semiconductor device includes a substrate comprising a semiconductor material. The substrate has a surface that defines a surface normal direction and includes a P-N junction comprising an interface between a first region and a second region, where the first (second) region includes a first (second) dopant type, so as to have a first (second) conductivity type. The substrate includes a termination extension region disposed adjacent to the P-N junction and having an effective concentration of the second dopant type that is generally the effective concentration of the second dopant type in the second doped region. The substrate includes an adjust region disposed adjacent to the surface and between the surface and at least part of the termination extension region, where the effective concentration of the second dopant type generally decreases when moving from the termination extension region into the adjust region along the surface normal direction.
    Type: Application
    Filed: August 29, 2012
    Publication date: August 29, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Ramakrishna Rao, Stephen Daley Arthur, Peter Almern Losee, Kevin Sean Matocha
  • Publication number: 20130153953
    Abstract: A thyristor device includes a semiconductor body and a conductive anode. The semiconductor body has a plurality of doped layers forming a plurality of dopant junctions and includes an optical thyristor, a first amplifying thyristor, and a switching thyristor. The conductive anode is disposed on a first side of the semiconductor body. The optical thyristor is configured to receive incident radiation to generate a first electric current, and the first amplifying thyristor is configured to increase the first electric current from the optical thyristor to at least a threshold current. The switching thyristor switches to the conducting state in order to conduct a second electric current from the anode and through the semiconductor body.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Ahmed Elasser, Arthur Stephen Daley, Alexey Vert, Stanislav I. Soloviev, Peter Almern Losee
  • Patent number: 8278711
    Abstract: A substrate having semiconductor material and a surface that supports a gate electrode and defines a surface normal direction is provided. The substrate can include a drift region including a first dopant type. A well region can be disposed adjacent to the drift region and proximal to the surface, and can include a second dopant type. A termination extension region can be disposed adjacent to the well region and extend away from the gate electrode, and can have an effective concentration of second dopant type that is generally less than that in the well region. An adjust region can be disposed between the surface and at least part of the termination extension region. An effective concentration of second dopant type may generally decrease when moving from the termination extension region into the adjust region along the surface normal direction.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: October 2, 2012
    Assignee: General Electric Company
    Inventors: Ramakrishna Rao, Stephen Daley Arthur, Peter Almern Losee, Kevin Dean Matocha
  • Patent number: 8232637
    Abstract: A power module includes one or more semiconductor power devices bonded to an insulated metal substrate (IMS). A plurality of cooling fluid channels is integrated into the IMS.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: July 31, 2012
    Assignee: General Electric Company
    Inventors: Richard Alfred Beaupre, Peter Almern Losee, Xiaochun Shen, John Stanley Glaser, Joseph Lucian Smolenski, Adam Gregory Pautsch
  • Publication number: 20120153362
    Abstract: A method comprising, introducing a dopant type into a semiconductor layer to define a well region of the semiconductor layer, the well region comprising a channel region, and introducing a dopant type into the well region to define a multiple implant region substantially coinciding with the well region but excluding the channel region.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 21, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Zachary Matthew Stum, Stephen Daley Arthur, Kevin Sean Matocha, Peter Almern Losee
  • Publication number: 20120126321
    Abstract: A substrate having semiconductor material and a surface that supports a gate electrode and defines a surface normal direction is provided. The substrate can include a drift region including a first dopant type. A well region can be disposed adjacent to the drift region and proximal to the surface, and can include a second dopant type. A termination extension region can be disposed adjacent to the well region and extend away from the gate electrode, and can have an effective concentration of second dopant type that is generally less than that in the well region. An adjust region can be disposed between the surface and at least part of the termination extension region. An effective concentration of second dopant type may generally decrease when moving from the termination extension region into the adjust region along the surface normal direction.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 24, 2012
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Ramakrishna Rao, Stephen Daley Arthur, Peter Almern Losee, Kevin Dean Matocha
  • Publication number: 20110024765
    Abstract: There are provided semiconductor structures and devices comprising silicon carbide (SiC) and methods for making the same. The structures and devices comprise a base or shielding layer, channel and surface layer, all desirably formed via ion implantation. As a result, the structures and devices provided herein are hard, “normally off” devices, i.e., exhibiting threshold voltages of greater than about 3 volts.
    Type: Application
    Filed: July 31, 2009
    Publication date: February 3, 2011
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Peter Almern Losee, Stephen Daley Arthur, Dale Marius Brown, Kevin Sean Matocha, Ravinuthala Ramakrishna Rao
  • Publication number: 20100308340
    Abstract: Provided is a device that includes a semiconductor body having a surface. Source and drain regions with effective dopant populations of a first polarity can be disposed adjacent to the surface and spaced apart from one another. A channel region with an effective dopant population of the first polarity can extend between the source and drain regions while being spaced apart from the surface. A gate region with an effective dopant population of a second polarity and first effective dopant density can extend between the source and drain regions and be disposed between the channel region and the surface. A gate contact region can be disposed between the source and drain regions and adjacent to the surface. The gate contact region can have an effective dopant population of the second polarity and a second effective dopant density greater than the first effective dopant density.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Vinayak Tilak, Peter Almern Losee
  • Patent number: 7829402
    Abstract: A MOSFET device and a method for fabricating MOSFET devices are disclosed. The method includes providing a semiconductor device structure including a semiconductor device layer of a first conductivity type, and ion implanting a well structure of a second conductivity type in the semiconductor device layer, where the ion implanting includes providing a dopant concentration profile in a single mask implant sequence.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: November 9, 2010
    Assignee: General Electric Company
    Inventors: Kevin Sean Matocha, Stephen Daley Arthur, Ramakrishna Rao, Peter Almern Losee, Zachary Matthew Stum
  • Publication number: 20100277868
    Abstract: A power module includes one or more semiconductor power devices bonded to an insulated metal substrate (IMS). A plurality of cooling fluid channels is integrated into the IMS.
    Type: Application
    Filed: April 30, 2009
    Publication date: November 4, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Richard Alfred Beaupre, Peter Almern Losee, Xiaochun Shen, John Stanley Glaser, Joseph Lucian Smolenski, Adam Gregory Pautsch
  • Publication number: 20100200931
    Abstract: A MOSFET device and a method for fabricating MOSFET devices are disclosed. The method includes providing a semiconductor device structure including a semiconductor device layer of a first conductivity type, and ion implanting a well structure of a second conductivity type in the semiconductor device layer, where the ion implanting includes providing a dopant concentration profile in a single mask implant sequence.
    Type: Application
    Filed: February 10, 2009
    Publication date: August 12, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Kevin Sean Matocha, Stephen Daley Arthur, Ramakrishna Rao, Peter Almern Losee, Zachary Matthew Stum