Abstract: A metal layer etch process deposits, patterns and anisotropically etches a polysilicon layer (24) down to an underlying metal layer (22) to form an etched polysilicon structure (54) with polymer layers (50, 52) formed on its sidewall surfaces. The polymer layer (50, 52) are removed to expose an additional surface area (60, 62) of the metal layer (22), and dielectric layers (80, 82) are formed on the sidewall surfaces of the etched polysilicon structure (54). Next, the metal layer (22) is plasma etched to form an etched metal layer (95) with substantially vertical sidewall surfaces (97, 99) by simultaneously charging the dielectric layers (80, 82) to change plasma ion trajectories near the dielectric layers (80, 82) so that plasma ions (92, 94) impact the sidewall surfaces (97, 99) in a more perpendicular angle to enhance etching of the sidewall surfaces (97, 99) of the etched metal layer (95).

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with an electron beam in the absence of an atomic halogen specie prior to proceeding with the etching process.

Abstract: A semiconductor device having upright dielectric nanotubes at an inter-layer dielectric level and method of manufacturing such a device is disclosed. The use of a catalyst is proposed in the disclosed manufacturing flow that facilitates growth of upright dielectric nanotubes having ultra low-k values that form all or part of the dielectric material for an ILD. In one embodiment, carbon nanotubes form interlayer conducting vias. In another embodiment dielectric material nanotubes form reinforcing pillars. The integration of catalysts is proposed to accommodate both upright dielectric and upright conducting nanotube fabrication in the same layer.

Abstract: A method for forming a capacitor includes providing a metal-containing bottom electrode, forming a capacitor insulator over the metal-containing bottom electrode, forming a metal-containing top electrode over the capacitor insulator, and forming a dielectric-containing field modification layer over the capacitor insulator and at least partially surrounding the metal-containing top electrode. Forming the dielectric-containing field modification layer may include oxidizing a sidewall of the metal-containing field modification layer. A barrier layer may be formed over the capacitor insulator prior to forming the metal-containing top electrode.

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with a hydrocarbon chemistry or hydrofluorocarbon chemistry or fluorocarbon chemistry or combination of two or more thereof prior to proceeding with the etching process.

Abstract: A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portion of the dielectric layer and the sacrificial layer which is located between two columns of metallic catalysts. The lateral opening includes a neck portion and a cavity portion which is used as a constrained space to grow a nanotube. A plasma is used to apply electric charge that forms an electric field which controls the direction of formation of the nanotubes. Nanotubes from each column of metallic catalyst are laterally grown and either abut or merge into one nanotube. Contact to the nanotube may be made from either the neck portion or the columns of metallic catalysts.

Abstract: A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portion of the dielectric layer and the sacrificial layer which is located between two columns of metallic catalysts. The lateral opening includes a neck portion and a cavity portion which is used as a constrained space to grow a nanotube. A plasma is used to apply electric charge that forms an electric field which controls the direction of formation of the nanotubes. Nanotubes from each column of metallic catalyst are laterally grown and either abut or merge into one nanotube. Contact to the nanotube may be made from either the neck portion or the columns of metallic catalysts.

Abstract: A method for etching a dielectric film is provided herein. In accordance with the method, a device (201) is provided which comprises a first chamber (203) equipped with a first gas supply (209) and a second chamber (205) equipped with a second gas supply (215), wherein the second chamber is in communication with the first chamber by way of an acceleration grid (211) having a variable potential. The gas flow into the plasma chamber is oscillated between a first state in which the gas flow into the first chamber has the composition f11 and the gas flow into the second chamber has the composition f21, and a second state in which the gas flow into the first chamber has the composition f12 and the gas flow into the second chamber has the composition f22.

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with a hydrocarbon chemistry or hydrofluorocarbon chemistry or fluorocarbon chemistry or combination of two or more thereof prior to proceeding with the etching process.

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with an electron beam in the absence of an atomic halogen specie prior to proceeding with the etching process.

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with an oxygen-containing plasma or halogen-containing plasma or a noble gas plasma or a combination of two or more thereof prior to proceeding with the etching process.

Abstract: A method for forming a dielectric layer is disclosed herein. In accordance with the method, a first material is provided (303) which comprises a suspension of nanoparticles in a liquid medium. A dielectric layer is then formed (305) on the substrate from the suspension through an evaporative process.

Abstract: A chromeless phase lithography mask (30) that does not require photoresist to manufacture has a quartz substrate (32) is etched by using a plasma (38) containing one of a nitrogen augmented hydro-fluorocarbon oxygen mixture and a nitrogen augmented fluorocarbon oxygen mixture. Various hydro-fluorocarbons or fluorocarbons may be used. The nitrogen addition results in etched openings in the quartz substrate that have substantially vertical sidewalls in a uniform manner across the substrate. Surface roughness is minimized and edges of the openings are well-defined with minimal rounding. The etch rate is rendered controllable by reducing bias power without degrading a desired vertical sidewall profile.

Abstract: A method for depositing a barrier or coating layer (34) in a semiconductor recessed structure (28) within a substrate (20) using a plasma process (62) that includes alternating depositing steps (64) and resputtering steps (66). The depositing step (64) deposits a barrier layer (34), including a thick bottom region (38) and a sidewall region (40) along the recessed structure (28) surface. The resputtering step (66) reduces the barrier layer (34) thickness in the bottom region (38) and increases the barrier layer (34) thickness in the otherwise thinly covered portions of the substrate sidewall region (40). Control of powers ranges supplied to the sputtering target (14) and the substrate (20) achieve the depositing and resputtering steps. The process applies also to other coating layers than barrier layers (34), providing a uniform sidewall coverage and thin bottom coverage, e.g., for permalloy deposition in MRAM devices and dual gate electrode formation in CMOS devices.

Abstract: A magnetic clad bit line structure (274) for a magnetic memory element and its method of formation are disclosed. The magnetic clad bit line structure (274) extends within a trench (258) and includes a conductive material (250), magnetic cladding sidewalls (262) and a magnetic cladding capping layer (272). The magnetic cladding sidewalls (262) are formed by sputtering a material within the trench (258) and selectively resputtering the material deposited at the bottom of the trench (258) onto the adjacent sidewalls of the trench (258).

Abstract: A method and an apparatus for forming a layer on a substrate are disclosed. In accordance with one embodiment, a substrate (901) is placed into a chamber (30) that includes a coil (16) and a shield (14) wherein the coil and the shield are electrically isolated by an isolation/support member (32) having a first surface (321) that is substantially contiguous with a surface of the coil and having a second surface (322) that is substantially contiguous with a surface of the shield. A layer (1002, 1102) is then deposited onto the substrate (901).

Abstract: A method and an apparatus for forming a layer on a substrate are disclosed. In accordance with one embodiment, a substrate (901) is placed into a chamber (30) that includes a coil (16) and a shield (14) wherein the coil and the shield are electrically isolated by an isolation/support member (32) having a first surface (321) that is substantially contiguous with a surface of the coil and having a second surface (322) that is substantially contiguous with a surface of the shield. A layer (1002, 1102) is then deposited onto the substrate (901).