Patents by Inventor Po-Han Lee

Po-Han Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8952519
    Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposing second surface. A spacer is disposed under the second surface of the semiconductor substrate and a cover plate is disposed under the spacer. A recessed portion is formed adjacent to a sidewall of the semiconductor substrate, extending from the first surface of the semiconductor substrate to at least the spacer. Then, a protection layer is disposed over the first surface of the semiconductor substrate and in the recessed portion.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: February 10, 2015
    Inventors: Chia-Sheng Lin, Po-Han Lee
  • Patent number: 8872196
    Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a sensor region formed in the semiconductor substrate; a light emitting device disposed on the second surface of the semiconductor substrate; at least one first conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the sensor region; at least one second conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the light emitting device; and an insulating layer located on the semiconductor substrate to electrically insulate the semiconductor substrate from the at least one first conducting bump and the at least one second conducting bump.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: October 28, 2014
    Inventors: Po-Han Lee, Chien-Hung Liu
  • Patent number: 8823179
    Abstract: An embodiment of the present invention provides an electronic device package, which includes a chip having a first surface and an opposite second surface and a trench extending into a body of the chip along a direction from the second surface to the first surface, wherein a bottom portion of the trench includes at least two contact holes.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: September 2, 2014
    Inventors: Chia-Lun Tsai, Wen-Cheng Chien, Po-Han Lee, Wei-Ming Chen, Chien-Hung Liu, Ying-Nan Wen
  • Patent number: 8432032
    Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: April 30, 2013
    Inventors: Chia-Sheng Lin, Chia-Lun Tsai, Chang-Sheng Hsu, Po-Han Lee
  • Patent number: 8319347
    Abstract: An electronic device package and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor substrate containing a plurality of chips having a first surface and an opposite second surface. A plurality of conductive electrodes is disposed on the first surface and the conductive electrodes of the two adjacent chips are arranged asymmetrically along side direction of the chip. A plurality of contact holes is formed in each chip, apart from the side of the chip, to expose the conductive electrodes.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: November 27, 2012
    Inventors: Chia-Lun Tsai, Wen-Cheng Chien, Po-Han Lee, Wei-Ming Chen
  • Publication number: 20110169139
    Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 14, 2011
    Inventors: Chia-Sheng Lin, Chia-Lun Tsai, Chang-Sheng Hsu, Po-Han Lee
  • Publication number: 20110169159
    Abstract: A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposing second surface. A spacer is disposed under the second surface of the semiconductor substrate and a cover plate is disposed under the spacer. A recessed portion is formed adjacent to a sidewall of the semiconductor substrate, extending from the first surface of the semiconductor substrate to at least the spacer. Then, a protection layer is disposed over the first surface of the semiconductor substrate and in the recessed portion.
    Type: Application
    Filed: June 15, 2010
    Publication date: July 14, 2011
    Inventors: Chia-Sheng LIN, Po-Han Lee
  • Publication number: 20100201568
    Abstract: A method for implementing GPS surveying field work planning by using three dimensional topographic information is provided, comprising the steps of: obtaining three dimensional topographic information according to the location of a GPS receiver; obtaining maximum topographic elevation angle information from the GPS receiver to the terrain for each azimuth using the three dimension topographic information; obtaining elevation angle of satellites from the GPS receiver according to the satellite ephemeris or almanac; determining whether observation is usable according to the maximum topographic elevation angle information along the satellite bearings, and the elevation angle of satellites; and estimating the positioning accuracy according to the usable satellite observations.
    Type: Application
    Filed: September 2, 2009
    Publication date: August 12, 2010
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Jen-Yu Han, Po-Han Lee
  • Publication number: 20100187697
    Abstract: An embodiment of the present invention provides an electronic device package, which includes a chip having a first surface and an opposite second surface and a trench extending into a body of the chip along a direction from the second surface to the first surface, wherein a bottom portion of the trench includes at least two contact holes.
    Type: Application
    Filed: June 13, 2008
    Publication date: July 29, 2010
    Inventors: Chia-Lun Tsai, Wen-Cheng Chien, Po-Han Lee, Wei-Ming Chen, Chien-Hung Liu, Ying-Nan Wen
  • Publication number: 20090289345
    Abstract: An electronic device package and a fabrication method thereof are provided. The fabrication method includes providing a semiconductor substrate containing a plurality of chips having a first surface and an opposite second surface. A plurality of conductive electrodes is disposed on the first surface and the conductive electrodes of the two adjacent chips are arranged asymmetrically along side direction of the chip. A plurality of contact holes is formed in each chip, apart from the side of the chip, to expose the conductive electrodes.
    Type: Application
    Filed: May 21, 2009
    Publication date: November 26, 2009
    Inventors: Chia-Lun TSAI, Wen-Cheng CHIEN, Po-Han LEE, Wei-Ming CHEN
  • Publication number: 20080303110
    Abstract: The invention provides an integrated circuit package and method for operating and fabricating thereof. The package comprises a transparent substrate having a first surface and a second surface opposite to each other and a semiconductor layer formed on the second surface of the transparent substrate. A photosensitive device is fabricated on the semiconductor layer and a metal plug is formed over the second surface of the transparent substrate and they are electrically connected to each other. A solder ball is formed over the second surface of the transparent substrate and electrically connected to the metal plug. In the package, the photosensitive device senses light penetrating the transparent substrate and the semiconductor layer through its backside to produce a signal which is subsequently transmitted to solder ball by the metal plug. Thus, the signal conductive path is shortened.
    Type: Application
    Filed: August 20, 2007
    Publication date: December 11, 2008
    Inventor: Po-Han Lee