Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

Abstract: A data processing node has an inter-node messaging module including a plurality of sets of registers each defining an instance of a GET/PUT context and a plurality of data processing cores each coupled to the inter-node messaging module. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables a particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a different data processing node coupled to the data processing node through a fabric without involvement of an operating system of any one of the data processing cores.

Abstract: A method of implementing remote transactions between system on a chip (SoC) nodes of a node interconnect fabric includes determining that a bus transaction initiated at a first one of the SoC nodes specifies a target at a second one of the SoC nodes, providing a virtual on-chip bus between the first and second SoC nodes within the fabric, and providing the bus transaction to the second one of the SoC nodes over the virtual link on-chip bus.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A switch includes a receive to receive a first message and a second message. The switch further includes first protocol logic to process the first message according to a first protocol and an adapter to process the second message according to a second protocol. The first protocol is different from the second protocol.

Abstract: A server apparatus comprises a plurality of server on a chip (SoC) nodes interconnected to each other through a node interconnect fabric. Each one of the SoC nodes has respective memory resources integral therewith. Each one of the SoC nodes has information computing resources accessible by one or more data processing systems. Each one of the SoC nodes configured with memory access functionality enabling allocation of at least a portion of said memory resources thereof to one or more other ones of the SoC nodes and enabling allocation of at least a portion of said memory resources of one or more other ones of the SoC nodes thereto based on a workload thereof.

Abstract: A data processing node includes a local clock, a slave port and a time synchronization module. The slave port enables the data processing node to be connected through a node interconnect structure to a parent node that is operating in a time synchronized manner with a fabric time of the node interconnect structure. The time synchronization module is coupled to the local clock and the slave port. The time synchronization module is configured for collecting parent-centric time synchronization information and for using a local time provided by the local clock and the parent-centric time synchronization information for allowing one or more time-based functionality of the data processing node to be implemented in accordance with the fabric time.

Abstract: A data processing node includes a local clock, a slave port and a time synchronization module. The slave port enables the data processing node to be connected through a node interconnect structure to a parent node having time-based functionality thereof that is operating in accordance with a fabric time of the node interconnect structure. The time synchronization module is coupled to the local clock and the slave port. The time synchronization module is configured for engaging in a time synchronization message exchange sequence with a node connected to the slave port thereof to collect parent-centric time synchronization information and synchronizing operation of a central processing unit (CPU) structure of the data processing node with the fabric time using the parent-centric time synchronization information.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for managing flow across the multi-protocol I/O interconnect may include providing, by a first port of a switching fabric of a multi-protocol interconnect to a second port of the switching fabric, a first credit grant packet and a second credit grant packet as indications of unoccupied space of a buffer associated with a path between the first port and a second port, and simultaneously routing a first data packet of a first protocol and a second data packet of a second protocol, different from the first protocol, on the path from the second port to the first port based at least in part on receipt by the second port of the first and second credit grant packets. Other embodiments may be described and claimed.

Abstract: A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.

Abstract: Methods and apparatus for implementing active interconnect link power management using an adaptive low-power link-state entry policy. The power state of an interconnect link or fabric is changed in response to applicable conditions determined by low-power link-state entry policy logic in view of runtime traffic on the interconnect link or fabric. The low-power link-state policy logic may be configured to include consideration of operating system input and Quality of Service (QoS) requirements for applications and devices employing the link or fabric, and device latency tolerance requirements.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include determining a first local time at a first port of a first switch of a switching fabric of a multi-protocol interconnect and a second local time at a second port of a second switch of the switching fabric, calculating an offset value based at least in part on a difference between the first local time and the second local time, and adjusting the second local time by the offset value. Other embodiments may be described and claimed.

Abstract: A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.

Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for managing flow across the multi-protocol I/O interconnect may include providing, by a first port of a switching fabric of a multi-protocol interconnect to a second port of the switching fabric, a first credit grant packet and a second credit grant packet as indications of unoccupied space of a buffer associated with a path between the first port and a second port, and simultaneously routing a first data packet of a first protocol and a second data packet of a second protocol, different from the first protocol, on the path from the second port to the first port based at least in part on receipt by the second port of the first and second credit grant packets. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A multi-protocol I/O interconnect may include a switching fabric operatively coupled to a first protocol-specific controller and a second protocol-specific controller, and may be configured to simultaneously route packets of the first protocol to the first protocol-specific controller and packets of the second protocol to the second protocol-specific controller. Other embodiments may be described and claimed.

Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for configuring a multi-protocol I/O interconnect may include identifying a plurality of switches of a switching fabric of a multi-protocol I/O interconnect, and configuring a path from a port of a first switch of the plurality of switches to a port of a second switch of the plurality of switches. Packets of a first protocol and packets of a second protocol, different from the first protocol, may be simultaneously routed over the path. Other embodiments may be described and claimed.